return val & BIT(idx);
 }
 
+static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
+{
+       struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);
+       struct ingenic_pinctrl *jzpc = jzgc->jzpc;
+       unsigned int pin = gc->base + offset;
+
+       if (jzpc->version >= ID_JZ4770)
+               return ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PAT1);
+
+       if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_SELECT))
+               return true;
+
+       return !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR);
+}
+
 static const struct pinctrl_ops ingenic_pctlops = {
        .get_groups_count = pinctrl_generic_get_group_count,
        .get_group_name = pinctrl_generic_get_group_name,
        jzgc->gc.get = ingenic_gpio_get;
        jzgc->gc.direction_input = ingenic_gpio_direction_input;
        jzgc->gc.direction_output = ingenic_gpio_direction_output;
+       jzgc->gc.get_direction = ingenic_gpio_get_direction;
 
        if (of_property_read_bool(node, "gpio-ranges")) {
                jzgc->gc.request = gpiochip_generic_request;