arm64: dts: ls208xa: add DT node for external interrupt lines

Add device-tree node for external interrupt lines IRQ0-IRQ11.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index c68901f8c6f0bf024126feccf9a891c526142abe..767e3710bff25299cf8da8f6296b03d0376900fd 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -3,7 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-2080A family SoC.
  *
  * Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
  *
  * Abhimanyu Saini <abhimanyu.saini@nxp.com>
  *
@@ -277,6 +277,37 @@
                        little-endian;
                };
 
+               isc: syscon@1f70000 {
+                       compatible = "fsl,ls2080a-isc", "syscon";
+                       reg = <0x0 0x1f70000 0x0 0x10000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x0 0x1f70000 0x10000>;
+
+                       extirq: interrupt-controller@14 {
+                               compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
+                               #interrupt-cells = <2>;
+                               #address-cells = <0>;
+                               interrupt-controller;
+                               reg = <0x14 4>;
+                               interrupt-map =
+                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-map-mask = <0xffffffff 0x0>;
+                       };
+               };
+
                tmu: tmu@1f80000 {
                        compatible = "fsl,qoriq-tmu";
                        reg = <0x0 0x1f80000 0x0 0x10000>;