Pull irq fixes from Borislav Petkov:
 - Work around an erratum on GIC700, where a race between a CPU handling
   a wake-up interrupt, a change of affinity, and another CPU going to
   sleep can result in a lack of wake-up event on the next interrupt
 - Fix the locking required on a VPE for GICv4
 - Enable Rockchip 
3588001 erratum workaround for RK3588S
 - Fix the irq-bcm6345-l1 assumtions of the boot CPU always be the first
   CPU in the system
* tag 'irq_urgent_for_v6.5_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/gic-v3: Workaround for GIC-700 erratum 
2941627
  irqchip/gic-v3: Enable Rockchip 
3588001 erratum workaround for RK3588S
  irqchip/gic-v4.1: Properly lock VPEs when doing a directLPI invalidation
  irq-bcm6345-l1: Do not assume a fixed block to cpu mapping
 
  +----------------+-----------------+-----------------+-----------------------------+
  | ARM            | MMU-500         | #841119,826419  | N/A                         |
  +----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | MMU-600         | #1076982,1209401| N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
 +| ARM            | MMU-700         | #2268618,2812531| N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  +----------------+-----------------+-----------------+-----------------------------+
+ | ARM            | GIC-700         | #2941627        | ARM64_ERRATUM_2941627       |
+ +----------------+-----------------+-----------------+-----------------------------+
+ +----------------+-----------------+-----------------+-----------------------------+
  | Broadcom       | Brahma-B53      | N/A             | ARM64_ERRATUM_845719        |
  +----------------+-----------------+-----------------+-----------------------------+
  | Broadcom       | Brahma-B53      | N/A             | ARM64_ERRATUM_843419        |