arm64: dts: socfpga: agilex: move FPGA region out of soc node

The "soc" node is supposed to have only MMIO children, so move the FPGA
region node to top level to fix dtc W=1 warnings like:

  socfpga_agilex.dtsi:141.20-146.5: Warning (simple_bus_reg): /soc@0/base_fpga_region: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index de1453a951d64e1468bbeb5b5e63dfb203e962a1..77d03caea25b6b0a56b22247676e0e580e5189c4 100644 (file)
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -60,6 +60,13 @@
                };
        };
 
+       fpga-region {
+               compatible = "fpga-region";
+               #address-cells = <0x2>;
+               #size-cells = <0x2>;
+               fpga-mgr = <&fpga_mgr>;
+       };
+
        pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
@@ -138,13 +145,6 @@
                interrupt-parent = <&intc>;
                ranges = <0 0 0 0xffffffff>;
 
-               base_fpga_region {
-                       #address-cells = <0x2>;
-                       #size-cells = <0x2>;
-                       compatible = "fpga-region";
-                       fpga-mgr = <&fpga_mgr>;
-               };
-
                clkmgr: clock-controller@ffd10000 {
                        compatible = "intel,agilex-clkmgr";
                        reg = <0xffd10000 0x1000>;