clk: meson: s4: pll: hifi_pll support fractional multiplier

The s4's hifi_pll supports a fractional frequency multiplier, but frac
parameters are not configured in the driver.

Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20240906-fix_clk-v1-3-2977ef0d72e7@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
index b0258933fb9d25b729af39c5744903bd953af513..a97e19057b05d37c3108f4cac79050ce4d67abe3 100644 (file)
--- a/drivers/clk/meson/s4-pll.c
+++ b/drivers/clk/meson/s4-pll.c
@@ -329,7 +329,6 @@ static struct clk_regmap s4_gp0_pll = {
  * Internal hifi pll emulation configuration parameters
  */
 static const struct reg_sequence s4_hifi_init_regs[] = {
-       { .reg = ANACTRL_HIFIPLL_CTRL1, .def = 0x00010e56 },
        { .reg = ANACTRL_HIFIPLL_CTRL2, .def = 0x00000000 },
        { .reg = ANACTRL_HIFIPLL_CTRL3, .def = 0x6a285c00 },
        { .reg = ANACTRL_HIFIPLL_CTRL4, .def = 0x65771290 },
@@ -354,6 +353,11 @@ static struct clk_regmap s4_hifi_pll_dco = {
                        .shift   = 10,
                        .width   = 5,
                },
+               .frac = {
+                       .reg_off = ANACTRL_HIFIPLL_CTRL1,
+                       .shift   = 0,
+                       .width   = 17,
+               },
                .l = {
                        .reg_off = ANACTRL_HIFIPLL_CTRL0,
                        .shift   = 31,