arm64: dts: mt8183: Add auxadc device node

Add auxadc device node for MT8183

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 9b525597e5ec9bf752404a80a943c6c1c74949d4..49909acc6efa94e94ac8036a22615f66e3ac7c7b 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -26,6 +26,10 @@
        };
 };
 
+&auxadc {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index e74ea21ffa780d855affd4b618413b995a628487..5672c18d53601cae12934a7fa7131dfdec694aab 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -245,6 +245,16 @@
                        clock-names = "spi", "wrap";
                };
 
+               auxadc: auxadc@11001000 {
+                       compatible = "mediatek,mt8183-auxadc",
+                                    "mediatek,mt8173-auxadc";
+                       reg = <0 0x11001000 0 0x1000>;
+                       clocks = <&infracfg CLK_INFRA_AUXADC>;
+                       clock-names = "main";
+                       #io-channel-cells = <1>;
+                       status = "disabled";
+               };
+
                uart0: serial@11002000 {
                        compatible = "mediatek,mt8183-uart",
                                     "mediatek,mt6577-uart";