ASoC: fsl_micfil: Add i.MX943 platform support

On i.MX943, the FIFO data address is changed to 0x20~0x3c,
compared to previous version, there is a minus 4 offset,
so add a new regmap configuration for it.
And the bit width of CICOSR is changed to 5 bits, from bit
16th to 20th in REG_MICFIL_CTRL2 register, so update its
definition header file.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/20250114102720.3664667-2-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index e908cfb594ab5f2a7ab8e5ee68d276f5474f87a4..1075598a6647b1728c9834629b823dab5ec6e31e 100644 (file)
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -89,6 +89,7 @@ struct fsl_micfil_soc_data {
        bool use_verid;
        bool volume_sx;
        u64  formats;
+       int  fifo_offset;
 };
 
 static struct fsl_micfil_soc_data fsl_micfil_imx8mm = {
@@ -98,6 +99,7 @@ static struct fsl_micfil_soc_data fsl_micfil_imx8mm = {
        .dataline =  0xf,
        .formats = SNDRV_PCM_FMTBIT_S16_LE,
        .volume_sx = true,
+       .fifo_offset = 0,
 };
 
 static struct fsl_micfil_soc_data fsl_micfil_imx8mp = {
@@ -107,6 +109,7 @@ static struct fsl_micfil_soc_data fsl_micfil_imx8mp = {
        .dataline =  0xf,
        .formats = SNDRV_PCM_FMTBIT_S32_LE,
        .volume_sx = false,
+       .fifo_offset = 0,
 };
 
 static struct fsl_micfil_soc_data fsl_micfil_imx93 = {
@@ -118,12 +121,26 @@ static struct fsl_micfil_soc_data fsl_micfil_imx93 = {
        .use_edma = true,
        .use_verid = true,
        .volume_sx = false,
+       .fifo_offset = 0,
+};
+
+static struct fsl_micfil_soc_data fsl_micfil_imx943 = {
+       .imx = true,
+       .fifos = 8,
+       .fifo_depth = 32,
+       .dataline =  0xf,
+       .formats = SNDRV_PCM_FMTBIT_S32_LE,
+       .use_edma = true,
+       .use_verid = true,
+       .volume_sx = false,
+       .fifo_offset = -4,
 };
 
 static const struct of_device_id fsl_micfil_dt_ids[] = {
        { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
        { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
        { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
+       { .compatible = "fsl,imx943-micfil", .data = &fsl_micfil_imx943 },
        {}
 };
 MODULE_DEVICE_TABLE(of, fsl_micfil_dt_ids);
@@ -793,7 +810,7 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
        ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
                                 MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
                                 FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
-                                FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr));
+                                FIELD_PREP(MICFIL_CTRL2_CICOSR, 32 - osr));
 
        /* Configure CIC OSR in VADCICOSR */
        regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
@@ -932,9 +949,39 @@ static const struct reg_default fsl_micfil_reg_defaults[] = {
        {REG_MICFIL_VAD0_ZCD,           0x00000004},
 };
 
+static const struct reg_default fsl_micfil_reg_defaults_v2[] = {
+       {REG_MICFIL_CTRL1,              0x00000000},
+       {REG_MICFIL_CTRL2,              0x00000000},
+       {REG_MICFIL_STAT,               0x00000000},
+       {REG_MICFIL_FIFO_CTRL,          0x0000001F},
+       {REG_MICFIL_FIFO_STAT,          0x00000000},
+       {REG_MICFIL_DATACH0 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH1 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH2 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH3 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH4 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH5 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH6 - 0x4,      0x00000000},
+       {REG_MICFIL_DATACH7 - 0x4,      0x00000000},
+       {REG_MICFIL_DC_CTRL,            0x00000000},
+       {REG_MICFIL_OUT_CTRL,           0x00000000},
+       {REG_MICFIL_OUT_STAT,           0x00000000},
+       {REG_MICFIL_VAD0_CTRL1,         0x00000000},
+       {REG_MICFIL_VAD0_CTRL2,         0x000A0000},
+       {REG_MICFIL_VAD0_STAT,          0x00000000},
+       {REG_MICFIL_VAD0_SCONFIG,       0x00000000},
+       {REG_MICFIL_VAD0_NCONFIG,       0x80000000},
+       {REG_MICFIL_VAD0_NDATA,         0x00000000},
+       {REG_MICFIL_VAD0_ZCD,           0x00000004},
+};
+
 static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg)
 {
        struct fsl_micfil *micfil = dev_get_drvdata(dev);
+       int ofs = micfil->soc->fifo_offset;
+
+       if (reg >= (REG_MICFIL_DATACH0 + ofs) && reg <= (REG_MICFIL_DATACH7 + ofs))
+               return true;
 
        switch (reg) {
        case REG_MICFIL_CTRL1:
@@ -942,14 +989,6 @@ static bool fsl_micfil_readable_reg(struct device *dev, unsigned int reg)
        case REG_MICFIL_STAT:
        case REG_MICFIL_FIFO_CTRL:
        case REG_MICFIL_FIFO_STAT:
-       case REG_MICFIL_DATACH0:
-       case REG_MICFIL_DATACH1:
-       case REG_MICFIL_DATACH2:
-       case REG_MICFIL_DATACH3:
-       case REG_MICFIL_DATACH4:
-       case REG_MICFIL_DATACH5:
-       case REG_MICFIL_DATACH6:
-       case REG_MICFIL_DATACH7:
        case REG_MICFIL_DC_CTRL:
        case REG_MICFIL_OUT_CTRL:
        case REG_MICFIL_OUT_STAT:
@@ -1003,17 +1042,15 @@ static bool fsl_micfil_writeable_reg(struct device *dev, unsigned int reg)
 
 static bool fsl_micfil_volatile_reg(struct device *dev, unsigned int reg)
 {
+       struct fsl_micfil *micfil = dev_get_drvdata(dev);
+       int ofs = micfil->soc->fifo_offset;
+
+       if (reg >= (REG_MICFIL_DATACH0 + ofs) && reg <= (REG_MICFIL_DATACH7 + ofs))
+               return true;
+
        switch (reg) {
        case REG_MICFIL_STAT:
        case REG_MICFIL_FIFO_STAT:
-       case REG_MICFIL_DATACH0:
-       case REG_MICFIL_DATACH1:
-       case REG_MICFIL_DATACH2:
-       case REG_MICFIL_DATACH3:
-       case REG_MICFIL_DATACH4:
-       case REG_MICFIL_DATACH5:
-       case REG_MICFIL_DATACH6:
-       case REG_MICFIL_DATACH7:
        case REG_MICFIL_OUT_STAT:
        case REG_MICFIL_VERID:
        case REG_MICFIL_PARAM:
@@ -1039,6 +1076,20 @@ static const struct regmap_config fsl_micfil_regmap_config = {
        .cache_type = REGCACHE_MAPLE,
 };
 
+static const struct regmap_config fsl_micfil_regmap_config_v2 = {
+       .reg_bits = 32,
+       .reg_stride = 4,
+       .val_bits = 32,
+
+       .max_register = REG_MICFIL_VAD0_ZCD,
+       .reg_defaults = fsl_micfil_reg_defaults_v2,
+       .num_reg_defaults = ARRAY_SIZE(fsl_micfil_reg_defaults_v2),
+       .readable_reg = fsl_micfil_readable_reg,
+       .volatile_reg = fsl_micfil_volatile_reg,
+       .writeable_reg = fsl_micfil_writeable_reg,
+       .cache_type = REGCACHE_MAPLE,
+};
+
 /* END OF REGMAP */
 
 static irqreturn_t micfil_isr(int irq, void *devid)
@@ -1243,9 +1294,14 @@ static int fsl_micfil_probe(struct platform_device *pdev)
        if (IS_ERR(regs))
                return PTR_ERR(regs);
 
-       micfil->regmap = devm_regmap_init_mmio(&pdev->dev,
-                                              regs,
-                                              &fsl_micfil_regmap_config);
+       if (of_device_is_compatible(np, "fsl,imx943-micfil"))
+               micfil->regmap = devm_regmap_init_mmio(&pdev->dev,
+                                                      regs,
+                                                      &fsl_micfil_regmap_config_v2);
+       else
+               micfil->regmap = devm_regmap_init_mmio(&pdev->dev,
+                                                      regs,
+                                                      &fsl_micfil_regmap_config);
        if (IS_ERR(micfil->regmap)) {
                dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n",
                        PTR_ERR(micfil->regmap));
@@ -1314,7 +1370,7 @@ static int fsl_micfil_probe(struct platform_device *pdev)
        }
 
        micfil->dma_params_rx.chan_name = "rx";
-       micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0;
+       micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0 + micfil->soc->fifo_offset;
        micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX;
 
        platform_set_drvdata(pdev, micfil);

diff --git a/sound/soc/fsl/fsl_micfil.h b/sound/soc/fsl/fsl_micfil.h
index b7798a7cbf2af87b14537a19a2657960e9a421dd..aa3661ea4ffc11ae283ca29a1b6bcbda7fe47881 100644 (file)
--- a/sound/soc/fsl/fsl_micfil.h
+++ b/sound/soc/fsl/fsl_micfil.h
@@ -62,7 +62,7 @@
 #define MICFIL_QSEL_VLOW1_QUALITY      5
 #define MICFIL_QSEL_VLOW2_QUALITY      4
 
-#define MICFIL_CTRL2_CICOSR            GENMASK(19, 16)
+#define MICFIL_CTRL2_CICOSR            GENMASK(20, 16)
 #define MICFIL_CTRL2_CLKDIV            GENMASK(7, 0)
 
 /* MICFIL Status Register -- REG_MICFIL_STAT 0x08 */