Driver should enable interrupt coalescing (during driver load and after
Controller Reset) for High IOPS queues by masking appropriate bits in IOC
INIT frame.
Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
Signed-off-by: Chandrakanth Patil <chandrakanth.patil@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
        __le32 pad_0;           /*0Ch */
 
        __le16 flags;           /*10h */
-       __le16 reserved_3;              /*12h */
+       __le16 replyqueue_mask;         /*12h */
        __le32 data_xfer_len;   /*14h */
 
        __le32 queue_info_new_phys_addr_lo;     /*18h */
 
                cpu_to_le32(lower_32_bits(ioc_init_handle));
        init_frame->data_xfer_len = cpu_to_le32(sizeof(struct MPI2_IOC_INIT_REQUEST));
 
+       /*
+        * Each bit in replyqueue_mask represents one group of MSI-x vectors
+        * (each group has 8 vectors)
+        */
+       if (instance->balanced_mode)
+               init_frame->replyqueue_mask =
+                      cpu_to_le16(~(~0 << instance->low_latency_index_start / 8));
+
        req_desc.u.low = cpu_to_le32(lower_32_bits(cmd->frame_phys_addr));
        req_desc.u.high = cpu_to_le32(upper_32_bits(cmd->frame_phys_addr));
        req_desc.MFAIo.RequestFlags =