PCI: qcom: Fix macro typo for CURSOR

Correct a typo in the macro names GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA and
GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA.

Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
[mani: reworded description]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20250904065225.1762793-3-ziyue.zhang@oss.qualcomm.com

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index cc71a2d90cd48c48c2d87d020b6240403bb0a40c..2418214730e4a2d065651f177bb64530b5d4f88b 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -133,8 +133,8 @@
 #define GEN3_EQ_FB_MODE_DIR_CHANGE_OFF         0x8AC
 #define GEN3_EQ_FMDC_T_MIN_PHASE23             GENMASK(4, 0)
 #define GEN3_EQ_FMDC_N_EVALS                   GENMASK(9, 5)
-#define GEN3_EQ_FMDC_MAX_PRE_CUSROR_DELTA      GENMASK(13, 10)
-#define GEN3_EQ_FMDC_MAX_POST_CUSROR_DELTA     GENMASK(17, 14)
+#define GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA      GENMASK(13, 10)
+#define GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA     GENMASK(17, 14)
 
 #define PCIE_PORT_MULTI_LANE_CTRL      0x8C0
 #define PORT_MLTI_UPCFG_SUPPORT                BIT(7)

diff --git a/drivers/pci/controller/dwc/pcie-qcom-common.c b/drivers/pci/controller/dwc/pcie-qcom-common.c
index 0c6f4514f922f406af788e6313ae3076eda78fe1..01c5387e53bfcc54dea2dbcbec21ef56381a3e07 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-qcom-common.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-common.c
@@ -38,12 +38,12 @@ void qcom_pcie_common_set_equalization(struct dw_pcie *pci)
                reg = dw_pcie_readl_dbi(pci, GEN3_EQ_FB_MODE_DIR_CHANGE_OFF);
                reg &= ~(GEN3_EQ_FMDC_T_MIN_PHASE23 |
                        GEN3_EQ_FMDC_N_EVALS |
-                       GEN3_EQ_FMDC_MAX_PRE_CUSROR_DELTA |
-                       GEN3_EQ_FMDC_MAX_POST_CUSROR_DELTA);
+                       GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA |
+                       GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA);
                reg |= FIELD_PREP(GEN3_EQ_FMDC_T_MIN_PHASE23, 0x1) |
                        FIELD_PREP(GEN3_EQ_FMDC_N_EVALS, 0xd) |
-                       FIELD_PREP(GEN3_EQ_FMDC_MAX_PRE_CUSROR_DELTA, 0x5) |
-                       FIELD_PREP(GEN3_EQ_FMDC_MAX_POST_CUSROR_DELTA, 0x5);
+                       FIELD_PREP(GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA, 0x5) |
+                       FIELD_PREP(GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA, 0x5);
                dw_pcie_writel_dbi(pci, GEN3_EQ_FB_MODE_DIR_CHANGE_OFF, reg);
 
                reg = dw_pcie_readl_dbi(pci, GEN3_EQ_CONTROL_OFF);