powerpc/perf: Fix disabling BHRB and instruction sampling

When the PMU is disabled, MMCRA is not updated to disable BHRB and
instruction sampling. This can lead to those features remaining enabled,
which can slow down a real or emulated CPU.

Fixes: 1cade527f6e9 ("powerpc/perf: BHRB control to disable BHRB logic when not used")
Cc: stable@vger.kernel.org # v5.9+
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231018153423.298373-1-npiggin@gmail.com

diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 8c1f7def596e4a581abcef43b383174918076f26..10b946e9c6e756e3d4623495a5613cdcd425e628 100644 (file)
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1371,8 +1371,7 @@ static void power_pmu_disable(struct pmu *pmu)
                /*
                 * Disable instruction sampling if it was enabled
                 */
-               if (cpuhw->mmcr.mmcra & MMCRA_SAMPLE_ENABLE)
-                       val &= ~MMCRA_SAMPLE_ENABLE;
+               val &= ~MMCRA_SAMPLE_ENABLE;
 
                /* Disable BHRB via mmcra (BHRBRD) for p10 */
                if (ppmu->flags & PPMU_ARCH_31)
@@ -1383,7 +1382,7 @@ static void power_pmu_disable(struct pmu *pmu)
                 * instruction sampling or BHRB.
                 */
                if (val != mmcra) {
-                       mtspr(SPRN_MMCRA, mmcra);
+                       mtspr(SPRN_MMCRA, val);
                        mb();
                        isync();
                }