.agp_unmap_memory       = intel_agp_unmap_memory,
  #endif
  };
 +
 +static const struct intel_gtt_driver i8xx_gtt_driver = {
 +      .gen = 2,
 +      .setup = i830_setup,
 +};
 +static const struct intel_gtt_driver i915_gtt_driver = {
 +      .gen = 3,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver g33_gtt_driver = {
 +      .gen = 3,
 +      .is_g33 = 1,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver pineview_gtt_driver = {
 +      .gen = 3,
 +      .is_pineview = 1, .is_g33 = 1,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver i965_gtt_driver = {
 +      .gen = 4,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver g4x_gtt_driver = {
 +      .gen = 5,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver ironlake_gtt_driver = {
 +      .gen = 5,
 +      .is_ironlake = 1,
 +      .setup = i9xx_setup,
 +};
 +static const struct intel_gtt_driver sandybridge_gtt_driver = {
 +      .gen = 6,
 +      .setup = i9xx_setup,
 +};
 +
 +/* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
 + * driver and gmch_driver must be non-null, and find_gmch will determine
 + * which one should be used if a gmch_chip_id is present.
 + */
 +static const struct intel_gtt_driver_description {
 +      unsigned int gmch_chip_id;
 +      char *name;
 +      const struct agp_bridge_driver *gmch_driver;
 +      const struct intel_gtt_driver *gtt_driver;
 +} intel_gtt_chipsets[] = {
 +      { PCI_DEVICE_ID_INTEL_82810_IG1, "i810", &intel_810_driver , NULL},
 +      { PCI_DEVICE_ID_INTEL_82810_IG3, "i810", &intel_810_driver , NULL},
 +      { PCI_DEVICE_ID_INTEL_82810E_IG, "i810", &intel_810_driver , NULL},
 +      { PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver , NULL},
 +      { PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
 +              &intel_830_driver , &i8xx_gtt_driver},
 +      { PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
 +              &intel_830_driver , &i8xx_gtt_driver},
 +      { PCI_DEVICE_ID_INTEL_82854_IG, "854",
 +              &intel_830_driver , &i8xx_gtt_driver},
 +      { PCI_DEVICE_ID_INTEL_82855GM_IG, "855GM",
 +              &intel_830_driver , &i8xx_gtt_driver},
 +      { PCI_DEVICE_ID_INTEL_82865_IG, "865",
 +              &intel_830_driver , &i8xx_gtt_driver},
 +      { PCI_DEVICE_ID_INTEL_E7221_IG, "E7221 (i915)",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82915G_IG, "915G",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82915GM_IG, "915GM",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82945G_IG, "945G",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82945GM_IG, "945GM",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82945GME_IG, "945GME",
 +              &intel_915_driver , &i915_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82946GZ_IG, "946GZ",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82G35_IG, "G35",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82965Q_IG, "965Q",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82965G_IG, "965G",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82965GM_IG, "965GM",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_82965GME_IG, "965GME/GLE",
 +              &intel_i965_driver , &i965_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_G33_IG, "G33",
 +              &intel_g33_driver , &g33_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_Q35_IG, "Q35",
 +              &intel_g33_driver , &g33_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_Q33_IG, "Q33",
 +              &intel_g33_driver , &g33_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, "GMA3150",
 +              &intel_g33_driver , &pineview_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_PINEVIEW_IG, "GMA3150",
 +              &intel_g33_driver , &pineview_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_GM45_IG, "GM45",
 +              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_EAGLELAKE_IG, "Eaglelake",
 +              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_Q45_IG, "Q45/Q43",
 +              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_G45_IG, "G45/G43",
 +              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_B43_IG, "B43",
 +              &intel_i965_driver , &g4x_gtt_driver },
++      { PCI_DEVICE_ID_INTEL_B43_1_IG, "B43",
++              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_G41_IG, "G41",
 +              &intel_i965_driver , &g4x_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG,
 +          "HD Graphics", &intel_i965_driver , &ironlake_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
 +          "HD Graphics", &intel_i965_driver , &ironlake_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT1_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_PLUS_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT1_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG,
 +          "Sandybridge", &intel_gen6_driver , &sandybridge_gtt_driver },
 +      { 0, NULL, NULL }
 +};
 +
 +static int find_gmch(u16 device)
 +{
 +      struct pci_dev *gmch_device;
 +
 +      gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
 +      if (gmch_device && PCI_FUNC(gmch_device->devfn) != 0) {
 +              gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL,
 +                                           device, gmch_device);
 +      }
 +
 +      if (!gmch_device)
 +              return 0;
 +
 +      intel_private.pcidev = gmch_device;
 +      return 1;
 +}
 +
 +int intel_gmch_probe(struct pci_dev *pdev,
 +                                    struct agp_bridge_data *bridge)
 +{
 +      int i, mask;
 +      bridge->driver = NULL;
 +
 +      for (i = 0; intel_gtt_chipsets[i].name != NULL; i++) {
 +              if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) {
 +                      bridge->driver =
 +                              intel_gtt_chipsets[i].gmch_driver;
 +                      intel_private.driver = 
 +                              intel_gtt_chipsets[i].gtt_driver;
 +                      break;
 +              }
 +      }
 +
 +      if (!bridge->driver)
 +              return 0;
 +
 +      bridge->dev_private_data = &intel_private;
 +      bridge->dev = pdev;
 +
 +      intel_private.bridge_dev = pci_dev_get(pdev);
 +
 +      dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
 +
 +      if (bridge->driver->mask_memory == intel_gen6_mask_memory)
 +              mask = 40;
 +      else if (bridge->driver->mask_memory == intel_i965_mask_memory)
 +              mask = 36;
 +      else
 +              mask = 32;
 +
 +      if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
 +              dev_err(&intel_private.pcidev->dev,
 +                      "set gfx device dma mask %d-bit failed!\n", mask);
 +      else
 +              pci_set_consistent_dma_mask(intel_private.pcidev,
 +                                          DMA_BIT_MASK(mask));
 +
 +      if (bridge->driver == &intel_810_driver)
 +              return 1;
 +
 +      if (intel_gtt_init() != 0)
 +              return 0;
 +
 +      return 1;
 +}
 +EXPORT_SYMBOL(intel_gmch_probe);
 +
 +struct intel_gtt *intel_gtt_get(void)
 +{
 +      return &intel_private.base;
 +}
 +EXPORT_SYMBOL(intel_gtt_get);
 +
 +void intel_gmch_remove(struct pci_dev *pdev)
 +{
 +      if (intel_private.pcidev)
 +              pci_dev_put(intel_private.pcidev);
 +      if (intel_private.bridge_dev)
 +              pci_dev_put(intel_private.bridge_dev);
 +}
 +EXPORT_SYMBOL(intel_gmch_remove);
 +
 +MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
 +MODULE_LICENSE("GPL and additional rights");
 
        I915_WRITE(PCH_ADPA, adpa);
  
        if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 -                   1000, 1))
 +                   1000))
-               DRM_ERROR("timed out waiting for FORCE_TRIGGER");
+               DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  
        if (turn_off_dac) {
                I915_WRITE(PCH_ADPA, temp);
                /* wait for FORCE_DETECT to go off */
                if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
                              CRT_HOTPLUG_FORCE_DETECT) == 0,
 -                           1000, 1))
 +                           1000))
-                       DRM_ERROR("timed out waiting for FORCE_DETECT to go off");
+                       DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
        }
  
        stat = I915_READ(PORT_HOTPLUG_STAT);
        return status;
  }
  
- static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
+ static enum drm_connector_status
+ intel_crt_detect(struct drm_connector *connector, bool force)
  {
        struct drm_device *dev = connector->dev;
 -      struct drm_encoder *encoder = intel_attached_encoder(connector);
 -      struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 +      struct intel_encoder *encoder = intel_attached_encoder(connector);
        struct drm_crtc *crtc;
        int dpms_mode;
        enum drm_connector_status status;
                        return connector_status_disconnected;
        }
  
 -      if (intel_crt_detect_ddc(encoder))
 +      if (intel_crt_detect_ddc(&encoder->base))
                return connector_status_connected;
  
+       if (!force)
+               return connector->status;
+ 
        /* for pre-945g platforms use load detect */
 -      if (encoder->crtc && encoder->crtc->enabled) {
 -              status = intel_crt_load_detect(encoder->crtc, intel_encoder);
 +      if (encoder->base.crtc && encoder->base.crtc->enabled) {
 +              status = intel_crt_load_detect(encoder->base.crtc, encoder);
        } else {
 -              crtc = intel_get_load_detect_pipe(intel_encoder, connector,
 +              crtc = intel_get_load_detect_pipe(encoder, connector,
                                                  NULL, &dpms_mode);
                if (crtc) {
 -                      status = intel_crt_load_detect(crtc, intel_encoder);
 -                      intel_release_load_detect_pipe(intel_encoder,
 +                      status = intel_crt_load_detect(crtc, encoder);
 +                      intel_release_load_detect_pipe(encoder,
                                                       connector, dpms_mode);
                } else
                        status = connector_status_unknown;