Revert "drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe split"

[Why/How]
A regression was identified with the change to add left edge pixel for
YCbCr422/420 + ODM combine cases.

This reverts commit 288c0254a0b0c9980dba9df7d5afadf27280b99c

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Martin Leung <martin.leung@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 1d0fd69cc7bd1bf5cf5d37434743398b943195e0..4d5194293dbd53b56d5ff41438ecb094cce2e5ee 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3098,10 +3098,6 @@ static bool update_planes_and_stream_state(struct dc *dc,
 
                        if (otg_master && otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE)
                                resource_build_test_pattern_params(&context->res_ctx, otg_master);
-
-                       if (otg_master && (otg_master->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422 ||
-                                       otg_master->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420))
-                               resource_build_subsampling_params(&context->res_ctx, otg_master);
                }
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 96ea283bd16904d955ea55cf4e4992bc1a41b4c5..1b7765bc5e5efadef59003e06b111b7412fc0c69 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -822,16 +822,6 @@ static struct rect calculate_odm_slice_in_timing_active(struct pipe_ctx *pipe_ct
                        stream->timing.v_border_bottom +
                        stream->timing.v_border_top;
 
-       /* Recout for ODM slices after the first slice need one extra left edge pixel
-        * for 3-tap chroma subsampling.
-        */
-       if (odm_slice_idx > 0 &&
-                       (pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422 ||
-                               pipe_ctx->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)) {
-               odm_rec.x -= 1;
-               odm_rec.width += 1;
-       }
-
        return odm_rec;
 }
 
@@ -1448,7 +1438,6 @@ void resource_build_test_pattern_params(struct resource_context *res_ctx,
        enum controller_dp_test_pattern controller_test_pattern;
        enum controller_dp_color_space controller_color_space;
        enum dc_color_depth color_depth = otg_master->stream->timing.display_color_depth;
-       enum dc_pixel_encoding pixel_encoding = otg_master->stream->timing.pixel_encoding;
        int h_active = otg_master->stream->timing.h_addressable +
                otg_master->stream->timing.h_border_left +
                otg_master->stream->timing.h_border_right;
@@ -1480,36 +1469,10 @@ void resource_build_test_pattern_params(struct resource_context *res_ctx,
                else
                        params->width = last_odm_slice_width;
 
-               /* Extra left edge pixel is required for 3-tap chroma subsampling. */
-               if (i != 0 && (pixel_encoding == PIXEL_ENCODING_YCBCR422 ||
-                               pixel_encoding == PIXEL_ENCODING_YCBCR420)) {
-                       params->offset -= 1;
-                       params->width += 1;
-               }
-
                offset += odm_slice_width;
        }
 }
 
-void resource_build_subsampling_params(struct resource_context *res_ctx,
-       struct pipe_ctx *otg_master)
-{
-       struct pipe_ctx *opp_heads[MAX_PIPES];
-       int odm_cnt = 1;
-       int i;
-
-       odm_cnt = resource_get_opp_heads_for_otg_master(otg_master, res_ctx, opp_heads);
-
-       /* For ODM slices after the first slice, extra left edge pixel is required
-        * for 3-tap chroma subsampling.
-        */
-       if (otg_master->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422 ||
-                       otg_master->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
-               for (i = 0; i < odm_cnt; i++)
-                       opp_heads[i]->stream_res.left_edge_extra_pixel = (i == 0) ? false : true;
-       }
-}
-
 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
 {
        const struct dc_plane_state *plane_state = pipe_ctx->plane_state;

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index f15ba7335336a79bebfd4de7210c8f6b28b6a5f3..c55d5155ecb9c0bd44d35af712c8bb27aac715c4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -1573,8 +1573,7 @@ static void dcn20_detect_pipe_changes(struct dc_state *old_state,
         * makes this assumption at the moment with how hubp reset is matched to
         * same index mpcc reset.
         */
-       if (old_pipe->stream_res.opp != new_pipe->stream_res.opp ||
-                       old_pipe->stream_res.left_edge_extra_pixel != new_pipe->stream_res.left_edge_extra_pixel)
+       if (old_pipe->stream_res.opp != new_pipe->stream_res.opp)
                new_pipe->update_flags.bits.opp_changed = 1;
        if (old_pipe->stream_res.tg != new_pipe->stream_res.tg)
                new_pipe->update_flags.bits.tg_changed = 1;
@@ -1962,10 +1961,6 @@ static void dcn20_program_pipe(
                        pipe_ctx->stream_res.opp,
                        &pipe_ctx->stream->bit_depth_params,
                        &pipe_ctx->stream->clamping);
-
-               pipe_ctx->stream_res.opp->funcs->opp_program_left_edge_extra_pixel(
-                       pipe_ctx->stream_res.opp,
-                       pipe_ctx->stream_res.left_edge_extra_pixel);
        }
 
        /* Set ABM pipe after other pipe configurations done */

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index ebb659c327e06f7a3baf6e975b7f745536441920..3a6bf77a68732166d320dbea642929c3201d3e01 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -333,8 +333,6 @@ struct stream_resource {
        uint8_t gsl_group;
 
        struct test_pattern_params test_pattern_params;
-
-       bool left_edge_extra_pixel;
 };
 
 struct plane_resource {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index b14d52e52fa2f43c2f7fa46891513de0675c8180..77a60aa9f27bbfdfa8a652306e2366dc0eca4345 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -107,10 +107,6 @@ void resource_build_test_pattern_params(
                struct resource_context *res_ctx,
                struct pipe_ctx *pipe_ctx);
 
-void resource_build_subsampling_params(
-               struct resource_context *res_ctx,
-               struct pipe_ctx *pipe_ctx);
-
 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
 
 enum dc_status resource_build_scaling_params_for_context(