irqchip/gic-common: Remove sync_access callback

The gic_configure_irq(), gic_dist_config(), and gic_cpu_config()
functions each take an optional "sync_access" callback, but in almost
all cases this is not used. The only user is the GICv3 driver's
gic_cpu_init() function, which uses gic_redist_wait_for_rwp() as the
"sync_access" callback for gic_cpu_config().

It would be simpler and clearer to remove the callback and have the
GICv3 driver call gic_redist_wait_for_rwp() explicitly after
gic_cpu_config().

Remove the "sync_access" callback, and call gic_redist_wait_for_rwp()
explicitly in the GICv3 driver.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240617111841.2529370-3-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
index afd6a1841715a152afd572dac15e4366bfd96d1f..4ed17620dc4d75c4d245a510af1b469ded12caa5 100644 (file)
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -45,7 +45,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
 }
 
 int gic_configure_irq(unsigned int irq, unsigned int type,
-                      void __iomem *base, void (*sync_access)(void))
+                      void __iomem *base)
 {
        u32 confmask = 0x2 << ((irq % 16) * 2);
        u32 confoff = (irq / 16) * 4;
@@ -84,14 +84,10 @@ int gic_configure_irq(unsigned int irq, unsigned int type,
 
        raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
 
-       if (sync_access)
-               sync_access();
-
        return ret;
 }
 
-void gic_dist_config(void __iomem *base, int gic_irqs,
-                    void (*sync_access)(void))
+void gic_dist_config(void __iomem *base, int gic_irqs)
 {
        unsigned int i;
 
@@ -118,12 +114,9 @@ void gic_dist_config(void __iomem *base, int gic_irqs,
                writel_relaxed(GICD_INT_EN_CLR_X32,
                               base + GIC_DIST_ENABLE_CLEAR + i / 8);
        }
-
-       if (sync_access)
-               sync_access();
 }
 
-void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void))
+void gic_cpu_config(void __iomem *base, int nr)
 {
        int i;
 
@@ -144,7 +137,4 @@ void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void))
        for (i = 0; i < nr; i += 4)
                writel_relaxed(GICD_INT_DEF_PRI_X4,
                                        base + GIC_DIST_PRI + i * 4 / 4);
-
-       if (sync_access)
-               sync_access();
 }

diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h
index f407cce9ecaaae3e1ef4e0265784336845648f8b..c230175dd584c516090c9a6ae52f8d3671723c42 100644 (file)
--- a/drivers/irqchip/irq-gic-common.h
+++ b/drivers/irqchip/irq-gic-common.h
@@ -20,10 +20,9 @@ struct gic_quirk {
 };
 
 int gic_configure_irq(unsigned int irq, unsigned int type,
-                       void __iomem *base, void (*sync_access)(void));
-void gic_dist_config(void __iomem *base, int gic_irqs,
-                    void (*sync_access)(void));
-void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void));
+                       void __iomem *base);
+void gic_dist_config(void __iomem *base, int gic_irqs);
+void gic_cpu_config(void __iomem *base, int nr);
 void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
                void *data);
 void gic_enable_of_quirks(const struct device_node *np,

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 6fb276504bcc834d058589d81f62213e70d071d3..d95dda2383fb5120b871a914e331a41dacbf9731 100644 (file)
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -670,7 +670,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
 
        offset = convert_offset_index(d, GICD_ICFGR, &index);
 
-       ret = gic_configure_irq(index, type, base + offset, NULL);
+       ret = gic_configure_irq(index, type, base + offset);
        if (ret && (range == PPI_RANGE || range == EPPI_RANGE)) {
                /* Misconfigured PPIs are usually not fatal */
                pr_warn("GIC: PPI INTID%ld is secure or misconfigured\n", irq);
@@ -940,7 +940,7 @@ static void __init gic_dist_init(void)
                writel_relaxed(GICD_INT_DEF_PRI_X4, base + GICD_IPRIORITYRnE + i);
 
        /* Now do the common stuff */
-       gic_dist_config(base, GIC_LINE_NR, NULL);
+       gic_dist_config(base, GIC_LINE_NR);
 
        val = GICD_CTLR_ARE_NS | GICD_CTLR_ENABLE_G1A | GICD_CTLR_ENABLE_G1;
        if (gic_data.rdists.gicd_typer2 & GICD_TYPER2_nASSGIcap) {
@@ -1282,7 +1282,8 @@ static void gic_cpu_init(void)
        for (i = 0; i < gic_data.ppi_nr + SGI_NR; i += 32)
                writel_relaxed(~0, rbase + GICR_IGROUPR0 + i / 8);
 
-       gic_cpu_config(rbase, gic_data.ppi_nr + SGI_NR, gic_redist_wait_for_rwp);
+       gic_cpu_config(rbase, gic_data.ppi_nr + SGI_NR);
+       gic_redist_wait_for_rwp();
 
        /* initialise system registers */
        gic_cpu_sys_reg_init();

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 98aa383e39db1c274e871258635e218962076998..87255bde960fc3e197a8408c8398da0a248246c4 100644 (file)
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -303,7 +303,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
                            type != IRQ_TYPE_EDGE_RISING)
                return -EINVAL;
 
-       ret = gic_configure_irq(gicirq, type, base + GIC_DIST_CONFIG, NULL);
+       ret = gic_configure_irq(gicirq, type, base + GIC_DIST_CONFIG);
        if (ret && gicirq < 32) {
                /* Misconfigured PPIs are usually not fatal */
                pr_warn("GIC: PPI%ld is secure or misconfigured\n", gicirq - 16);
@@ -479,7 +479,7 @@ static void gic_dist_init(struct gic_chip_data *gic)
        for (i = 32; i < gic_irqs; i += 4)
                writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
 
-       gic_dist_config(base, gic_irqs, NULL);
+       gic_dist_config(base, gic_irqs);
 
        writel_relaxed(GICD_ENABLE, base + GIC_DIST_CTRL);
 }
@@ -516,7 +516,7 @@ static int gic_cpu_init(struct gic_chip_data *gic)
                                gic_cpu_map[i] &= ~cpu_mask;
        }
 
-       gic_cpu_config(dist_base, 32, NULL);
+       gic_cpu_config(dist_base, 32);
 
        writel_relaxed(GICC_INT_PRI_THRESHOLD, base + GIC_CPU_PRIMASK);
        gic_cpu_if_up(gic);

diff --git a/drivers/irqchip/irq-hip04.c b/drivers/irqchip/irq-hip04.c
index 46161f6ff289daf866404f774b50ff3ed9900a59..5285150fd90965e386018526b78a8040d7d70e34 100644 (file)
--- a/drivers/irqchip/irq-hip04.c
+++ b/drivers/irqchip/irq-hip04.c
@@ -130,7 +130,7 @@ static int hip04_irq_set_type(struct irq_data *d, unsigned int type)
 
        raw_spin_lock(&irq_controller_lock);
 
-       ret = gic_configure_irq(irq, type, base + GIC_DIST_CONFIG, NULL);
+       ret = gic_configure_irq(irq, type, base + GIC_DIST_CONFIG);
        if (ret && irq < 32) {
                /* Misconfigured PPIs are usually not fatal */
                pr_warn("GIC: PPI%d is secure or misconfigured\n", irq - 16);
@@ -260,7 +260,7 @@ static void __init hip04_irq_dist_init(struct hip04_irq_data *intc)
        for (i = 32; i < nr_irqs; i += 2)
                writel_relaxed(cpumask, base + GIC_DIST_TARGET + ((i * 2) & ~3));
 
-       gic_dist_config(base, nr_irqs, NULL);
+       gic_dist_config(base, nr_irqs);
 
        writel_relaxed(1, base + GIC_DIST_CTRL);
 }
@@ -287,7 +287,7 @@ static void hip04_irq_cpu_init(struct hip04_irq_data *intc)
                if (i != cpu)
                        hip04_cpu_map[i] &= ~cpu_mask;
 
-       gic_cpu_config(dist_base, 32, NULL);
+       gic_cpu_config(dist_base, 32);
 
        writel_relaxed(0xf0, base + GIC_CPU_PRIMASK);
        writel_relaxed(1, base + GIC_CPU_CTRL);