SPI_FSI_STATUS_RDR_OVERRUN)
 #define SPI_FSI_PORT_CTRL              0x9
 
+struct fsi2spi {
+       struct fsi_device *fsi; /* FSI2SPI CFAM engine device */
+       struct mutex lock; /* lock access to the device */
+};
+
 struct fsi_spi {
        struct device *dev;     /* SPI controller device */
-       struct fsi_device *fsi; /* FSI2SPI CFAM engine device */
+       struct fsi2spi *bridge; /* FSI2SPI device */
        u32 base;
 };
 
        u32 sts;
        __be32 sts_be;
 
-       rc = fsi_device_read(ctx->fsi, FSI2SPI_STATUS, &sts_be,
+       rc = fsi_device_read(ctx->bridge->fsi, FSI2SPI_STATUS, &sts_be,
                             sizeof(sts_be));
        if (rc)
                return rc;
 
 static int fsi_spi_read_reg(struct fsi_spi *ctx, u32 offset, u64 *value)
 {
-       int rc;
+       int rc = 0;
        __be32 cmd_be;
        __be32 data_be;
        u32 cmd = offset + ctx->base;
+       struct fsi2spi *bridge = ctx->bridge;
 
        *value = 0ULL;
 
        if (cmd & FSI2SPI_CMD_WRITE)
                return -EINVAL;
 
-       cmd_be = cpu_to_be32(cmd);
-       rc = fsi_device_write(ctx->fsi, FSI2SPI_CMD, &cmd_be, sizeof(cmd_be));
+       rc = mutex_lock_interruptible(&bridge->lock);
        if (rc)
                return rc;
 
+       cmd_be = cpu_to_be32(cmd);
+       rc = fsi_device_write(bridge->fsi, FSI2SPI_CMD, &cmd_be,
+                             sizeof(cmd_be));
+       if (rc)
+               goto unlock;
+
        rc = fsi_spi_check_status(ctx);
        if (rc)
-               return rc;
+               goto unlock;
 
-       rc = fsi_device_read(ctx->fsi, FSI2SPI_DATA0, &data_be,
+       rc = fsi_device_read(bridge->fsi, FSI2SPI_DATA0, &data_be,
                             sizeof(data_be));
        if (rc)
-               return rc;
+               goto unlock;
 
        *value |= (u64)be32_to_cpu(data_be) << 32;
 
-       rc = fsi_device_read(ctx->fsi, FSI2SPI_DATA1, &data_be,
+       rc = fsi_device_read(bridge->fsi, FSI2SPI_DATA1, &data_be,
                             sizeof(data_be));
        if (rc)
-               return rc;
+               goto unlock;
 
        *value |= (u64)be32_to_cpu(data_be);
        dev_dbg(ctx->dev, "Read %02x[%016llx].\n", offset, *value);
 
-       return 0;
+unlock:
+       mutex_unlock(&bridge->lock);
+       return rc;
 }
 
 static int fsi_spi_write_reg(struct fsi_spi *ctx, u32 offset, u64 value)
 {
-       int rc;
+       int rc = 0;
        __be32 cmd_be;
        __be32 data_be;
        u32 cmd = offset + ctx->base;
+       struct fsi2spi *bridge = ctx->bridge;
 
        if (cmd & FSI2SPI_CMD_WRITE)
                return -EINVAL;
 
+       rc = mutex_lock_interruptible(&bridge->lock);
+       if (rc)
+               return rc;
+
        dev_dbg(ctx->dev, "Write %02x[%016llx].\n", offset, value);
 
        data_be = cpu_to_be32(upper_32_bits(value));
-       rc = fsi_device_write(ctx->fsi, FSI2SPI_DATA0, &data_be,
+       rc = fsi_device_write(bridge->fsi, FSI2SPI_DATA0, &data_be,
                              sizeof(data_be));
        if (rc)
-               return rc;
+               goto unlock;
 
        data_be = cpu_to_be32(lower_32_bits(value));
-       rc = fsi_device_write(ctx->fsi, FSI2SPI_DATA1, &data_be,
+       rc = fsi_device_write(bridge->fsi, FSI2SPI_DATA1, &data_be,
                              sizeof(data_be));
        if (rc)
-               return rc;
+               goto unlock;
 
        cmd_be = cpu_to_be32(cmd | FSI2SPI_CMD_WRITE);
-       rc = fsi_device_write(ctx->fsi, FSI2SPI_CMD, &cmd_be, sizeof(cmd_be));
+       rc = fsi_device_write(bridge->fsi, FSI2SPI_CMD, &cmd_be,
+                             sizeof(cmd_be));
        if (rc)
-               return rc;
+               goto unlock;
+
+       rc = fsi_spi_check_status(ctx);
 
-       return fsi_spi_check_status(ctx);
+unlock:
+       mutex_unlock(&bridge->lock);
+       return rc;
 }
 
 static int fsi_spi_data_in(u64 in, u8 *rx, int len)
                return rc;
 
        if (*status & SPI_FSI_STATUS_ANY_ERROR) {
-               dev_err(ctx->dev, "%s error: %08llx\n", dir, *status);
+               dev_err(ctx->dev, "%s error: %016llx\n", dir, *status);
 
                rc = fsi_spi_reset(ctx);
                if (rc)
        struct spi_transfer *transfer;
        struct fsi_spi *ctx = spi_controller_get_devdata(ctlr);
 
-       rc = fsi_spi_check_mux(ctx->fsi, ctx->dev);
+       rc = fsi_spi_check_mux(ctx->bridge->fsi, ctx->dev);
        if (rc)
                goto error;
 
        int rc;
        struct device_node *np;
        int num_controllers_registered = 0;
+       struct fsi2spi *bridge;
        struct fsi_device *fsi = to_fsi_dev(dev);
 
        rc = fsi_spi_check_mux(fsi, dev);
        if (rc)
                return -ENODEV;
 
+       bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
+       if (!bridge)
+               return -ENOMEM;
+
+       bridge->fsi = fsi;
+       mutex_init(&bridge->lock);
+
        for_each_available_child_of_node(dev->of_node, np) {
                u32 base;
                struct fsi_spi *ctx;
 
                ctx = spi_controller_get_devdata(ctlr);
                ctx->dev = &ctlr->dev;
-               ctx->fsi = fsi;
+               ctx->bridge = bridge;
                ctx->base = base + SPI_FSI_BASE;
 
                rc = devm_spi_register_controller(dev, ctlr);