]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 7 Sep 2022 09:10:46 +0000 (12:10 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 8 Sep 2022 11:20:31 +0000 (14:20 +0300)
Only reassign the pipe's DPLL if it's going through a full
.compute_config() cycle. If OTOH it's just getting modeset
eg. in order to change cdclk there doesn't seem much point in
picking a new DPLL for it.

This should also prevent .get_dplls() from seeing a funky port_clock
for DP even in cases where the readout produces a non-standard
clock and we (for some reason) have decided to not fully recompute
the state to remedy the situation.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-7-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_dpll.c

index b07fc5f5b111a1722c4785d1f39eb93d14f69b86..d5649bb5cd187bb2b17ffa1ad48bebb8e8e435e3 100644 (file)
@@ -6066,20 +6066,6 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state)
        }
 }
 
-static void intel_modeset_clear_plls(struct intel_atomic_state *state)
-{
-       struct intel_crtc_state *new_crtc_state;
-       struct intel_crtc *crtc;
-       int i;
-
-       for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
-               if (!intel_crtc_needs_modeset(new_crtc_state))
-                       continue;
-
-               intel_release_shared_dplls(state, crtc);
-       }
-}
-
 /*
  * This implements the workaround described in the "notes" section of the mode
  * set sequence documentation. When going from no pipes or single pipe to
@@ -6913,6 +6899,7 @@ static int intel_atomic_check(struct drm_device *dev,
                        if (ret)
                                goto fail;
 
+                       intel_release_shared_dplls(state, crtc);
                        continue;
                }
 
@@ -6960,8 +6947,6 @@ static int intel_atomic_check(struct drm_device *dev,
                ret = intel_modeset_calc_cdclk(state);
                if (ret)
                        return ret;
-
-               intel_modeset_clear_plls(state);
        }
 
        ret = intel_atomic_check_crtcs(state);
index 6b8d90d72e0017d1f01f788e7973ede306e02530..4b20541ba760810b340c7c683e53cbf070304ebe 100644 (file)
@@ -1436,11 +1436,9 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
        int ret;
 
        drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state));
+       drm_WARN_ON(&i915->drm, !crtc_state->hw.enable && crtc_state->shared_dpll);
 
-       if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll))
-               return 0;
-
-       if (!crtc_state->hw.enable)
+       if (!crtc_state->hw.enable || crtc_state->shared_dpll)
                return 0;
 
        if (!i915->display.funcs.dpll->crtc_get_shared_dpll)