x86: Use PRED_CMD MSR when ibpb is enabled

Since we have the knobs we should depend on those.

OraBug: 27448280

Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 9b876a8cc4a66cafb83c01a48f0c727735d81129..dd0c56c68faaf3789c0b3fd6b5f4d1bf1ba68402 100644 (file)
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -14,6 +14,7 @@
 #include <asm/apic.h>
 #include <asm/uv/uv.h>
 #include <asm/kaiser.h>
+#include <asm/spec_ctrl.h>
 
 /*
  *     TLB flushing, formerly SMP-only
@@ -104,7 +105,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
        unsigned cpu = smp_processor_id();
 
        /* Null tsk means switching to kernel, so that's safe */
-       if (boot_cpu_has(X86_FEATURE_SPEC_CTRL) && tsk &&
+       if (ibpb_inuse && tsk &&
            ___ptrace_may_access(tsk, current, PTRACE_MODE_IBPB))
                native_wrmsrl(MSR_IA32_PRED_CMD, FEATURE_SET_IBPB);