Updated GTH Board - Patch by Thomas Lange, 18 Oct 2001

diff --git a/CHANGELOG b/CHANGELOG
index 8d4c2445b58013fe6b5d39d9f708cb0fc9759626..2a932e387d14adff6a4ca1b5a9be8e796ded5604 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -56,6 +56,9 @@ To do:
 Modifications for 1.1.0:
 ======================================================================
 
+* Updated GTH Board
+  Patch by Thomas Lange, 18 Oct 2001
+
 * Extend LWMON keyboard driver to allow for more than one key-coded
   pre-boot command (we now support an unlimited number of keys)
 

diff --git a/board/gth/flash.c b/board/gth/flash.c
index 531b5ef3f86f9c60e326fba65c36c4b741d7d07b..54dc3088321ae558b22730932718e0b54cfb32c6 100644 (file)
--- a/board/gth/flash.c
+++ b/board/gth/flash.c
@@ -51,7 +51,7 @@ unsigned long flash_init (void)
 
        /*printf("faking");*/
 
-       return(0x4fffff);
+       return(0x1fffff);
 
        /* Init: no FLASHes known */
        for (i=0; i < CFG_MAX_FLASH_BANKS; ++i)

diff --git a/board/gth/gth.c b/board/gth/gth.c
index 5e7a1aed9a4628a6c9a0e3130829940332c951f4..18a3709a86d38cf54fdda5451f4908e5d3048b26 100644 (file)
--- a/board/gth/gth.c
+++ b/board/gth/gth.c
@@ -147,9 +147,10 @@ const uint fpga_table[] = {
   /* Exception, Offset 0x3C */
   0xfffffc04, 0xfffffc05, _NOT_USED_, _NOT_USED_ };
 
-int _initsdram(uint base, uint noMbytes){
+int _initsdram(uint base, uint *noMbytes){
   volatile immap_t *immap = (immap_t *)CFG_IMMR;
   volatile memctl8xx_t *mc = &immap->im_memctl;
+  volatile u32 *memptr;
 
   mc->memc_mptpr  = MPTPR_PTP_DIV16; /* (16-17) */
 
@@ -177,12 +178,28 @@ int _initsdram(uint base, uint noMbytes){
                             /* Lower 2 bits are not connected to chip */
   mc->memc_mcr = 0x80002114; /* run upm a at 0x14 (16-15) */
 
-  /* FIXME when not 32MB */
-  /* CS1, base 0x0000000 - 32 Mbyte, use UPM A */
-
-  mc->memc_or1 = 0xfe000000|OR_CSNT_SAM;
+  /* CS1, base 0x0000000 - 64 Mbyte, use UPM A */
+  mc->memc_or1 = 0xfc000000|OR_CSNT_SAM;
   mc->memc_br1 = BR_MS_UPMA|BR_V; /* SDRAM base always 0 */
 
+  /* Test if we really have 64 MB SDRAM */
+  memptr = (u32*)0;
+  *memptr = 0;
+ 
+  memptr = (u32*)0x2000000; /* First u32 in upper 32 MB */
+  *memptr = 0x12345678;
+  
+  memptr = (u32*)0;
+  if(*memptr==0x12345678){
+    /* Wrapped, only have 32 MB */
+    mc->memc_or1 = 0xfe000000|OR_CSNT_SAM;
+    *noMbytes=32;
+  }
+  else{
+    /* 64 MB */
+    *noMbytes=64;
+  }
+
   /* Setup FPGA in UPMB */
   upmconfig(UPMB, (uint *)fpga_table,sizeof(fpga_table)/sizeof(uint));
 
@@ -216,8 +233,6 @@ void _sdramdisable(void)
 
 int initsdram(uint base, uint *noMbytes)
 {
-  uint m;
-
   *noMbytes = 32;
 
 #ifdef CONFIG_START_IN_RAM
@@ -225,7 +240,7 @@ int initsdram(uint base, uint *noMbytes)
   return 0;
 #else
 
-  if(!_initsdram(base, m))
+  if(!_initsdram(base, noMbytes))
     {
 
       return 0;
@@ -269,6 +284,10 @@ long int initdram (int board_type)
     *(i+1) = ~(j+(j<<18));
   }
 
+#if defined(CONFIG_WATCHDOG)
+  watchdog_reset ();
+#endif  /* CONFIG_WATCHDOG */
+
   printf(".");
 
   for(i=(u32*)0,j=0;(u32)i<U32_S;i+=2,j+=2){
@@ -285,12 +304,20 @@ long int initdram (int board_type)
   }
 #endif
 
+#if defined(CONFIG_WATCHDOG)
+  watchdog_reset ();
+#endif  /* CONFIG_WATCHDOG */
+
   /* Clear memory */
   for(i=(u32*)0;(u32)i<U32_S;i++){
     *i = 0;
   }
 #endif /* !start in ram */
 
+#if defined(CONFIG_WATCHDOG)
+  watchdog_reset ();
+#endif  /* CONFIG_WATCHDOG */
+
   return (sdramsz << 20);
 }