cck_agc_rpt = cck_buf->cck_agc_rpt;
 
                /* (1)Hardware does not provide RSSI for CCK
-                * (2)PWDB, Average PWDB cacluated by
+                * (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                if (ppsc->rfpwr_state == ERFON)
                                pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
 
                                pstats->rx_mimo_signalstrength[i] = (u8) rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
 
                cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
 
                /* (1)Hardware does not provide RSSI for CCK
-                * (2)PWDB, Average PWDB cacluated by
+                * (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
                        pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1)
 
                cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
 
                /* (1)Hardware does not provide RSSI for CCK */
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                if (ppsc->rfpwr_state == ERFON)
                                pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
 
                cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
 
                /* (1)Hardware does not provide RSSI for CCK */
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, BIT(9));
                        pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
 
                cck_agc_rpt = p_phystrpt->cfosho[0];
 
                /* (1)Hardware does not provide RSSI for CCK
-                * (2)PWDB, Average PWDB cacluated by
+                * (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                cck_highpwr = (u8)rtlphy->cck_high_power;
                        pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
                }
 
-               /* (2)PWDB, Average PWDB cacluated by
+               /* (2)PWDB, Average PWDB calculated by
                 * hardware (for rate adaptive)
                 */
                rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;