]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: renesas: r8a774a1: Add missing iommus properties
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 8 Jul 2024 09:37:13 +0000 (11:37 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 29 Jul 2024 09:51:35 +0000 (11:51 +0200)
Add missing iommus properties to SDHI and Frame Compression Processor
device nodes that still lack them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/114e9915356670e59dae412c1054afad4ce4c964.1720430758.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a774a1.dtsi

index 1dbf9d56c68da8c69290be395c727c22675c2a8d..f065ee90649a4a5e45e80fa8463faec5654479ed 100644 (file)
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
+                       iommus = <&ipmmu_ds1 32>;
                        status = "disabled";
                };
 
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 313>;
+                       iommus = <&ipmmu_ds1 33>;
                        status = "disabled";
                };
 
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
+                       iommus = <&ipmmu_ds1 34>;
                        status = "disabled";
                };
 
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
+                       iommus = <&ipmmu_ds1 35>;
                        status = "disabled";
                };
 
                        clocks = <&cpg CPG_MOD 615>;
                        power-domains = <&sysc R8A774A1_PD_A3VC>;
                        resets = <&cpg 615>;
+                       iommus = <&ipmmu_vc0 16>;
                };
 
                fcpvb0: fcp@fe96f000 {
                        clocks = <&cpg CPG_MOD 607>;
                        power-domains = <&sysc R8A774A1_PD_A3VC>;
                        resets = <&cpg 607>;
+                       iommus = <&ipmmu_vi0 5>;
                };
 
                fcpvd0: fcp@fea27000 {