--- /dev/null
+* NXP LPC32xx SoC Real Time Clock controller
+
+Required properties:
+- compatible: must be "nxp,lpc3220-rtc"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- interrupts: The RTC interrupt
+
+Example:
+
+       rtc@40024000 {
+               compatible = "nxp,lpc3220-rtc";
+               reg = <0x40024000 0x1000>;
+               interrupts = <52 0>;
+       };
 
 #include <linux/rtc.h>
 #include <linux/slab.h>
 #include <linux/io.h>
+#include <linux/of.h>
 
 /*
  * Clock and Power control register offsets
 #define LPC32XX_RTC_PM_OPS NULL
 #endif
 
+#ifdef CONFIG_OF
+static const struct of_device_id lpc32xx_rtc_match[] = {
+       { .compatible = "nxp,lpc3220-rtc" },
+       { }
+};
+MODULE_DEVICE_TABLE(of, lpc32xx_rtc_match);
+#endif
+
 static struct platform_driver lpc32xx_rtc_driver = {
        .probe          = lpc32xx_rtc_probe,
        .remove         = __devexit_p(lpc32xx_rtc_remove),
        .driver = {
                .name   = RTC_NAME,
                .owner  = THIS_MODULE,
-               .pm     = LPC32XX_RTC_PM_OPS
+               .pm     = LPC32XX_RTC_PM_OPS,
+               .of_match_table = of_match_ptr(lpc32xx_rtc_match),
        },
 };