drm/amd/display: Add handling for DC power mode

[Why]
Future implementations will require a distinction between AC power and
DC power (wall power and battery power, respectively). To accomplish this,
adding a power mode parameter to certain dc interfaces, and adding a
separate DML2 instance for DC mode validation. Default behaviour unchanged.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1fe6c8a8d21b1b8a984a202026e3b0a119a7273b..a032506f1588626466934cc1722298169ac1d2f2 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2629,6 +2629,7 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)
        int i;
        struct dc_stream_state *del_streams[MAX_PIPES];
        int del_streams_count = 0;
+       struct dc_commit_streams_params params = {};
 
        memset(del_streams, 0, sizeof(del_streams));
 
@@ -2655,7 +2656,9 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)
                        goto fail;
        }
 
-       res = dc_commit_streams(dc, context->streams, context->stream_count);
+       params.streams = context->streams;
+       params.stream_count = context->stream_count;
+       res = dc_commit_streams(dc, &params);
 
 fail:
        dc_state_release(context);
@@ -2877,6 +2880,7 @@ static int dm_resume(void *handle)
        struct dc_state *dc_state;
        int i, r, j, ret;
        bool need_hotplug = false;
+       struct dc_commit_streams_params commit_params = {};
 
        if (dm->dc->caps.ips_support) {
                dc_dmub_srv_apply_idle_power_optimizations(dm->dc, false);
@@ -2926,7 +2930,9 @@ static int dm_resume(void *handle)
                        dc_enable_dmub_outbox(adev->dm.dc);
                }
 
-               WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count));
+               commit_params.streams = dc_state->streams;
+               commit_params.stream_count = dc_state->stream_count;
+               WARN_ON(!dc_commit_streams(dm->dc, &commit_params));
 
                dm_gpureset_commit_state(dm->cached_dc_state, dm);
 
@@ -2943,7 +2949,7 @@ static int dm_resume(void *handle)
        }
        /* Recreate dc_state - DC invalidates it when setting power state to S3. */
        dc_state_release(dm_state->context);
-       dm_state->context = dc_state_create(dm->dc);
+       dm_state->context = dc_state_create(dm->dc, NULL);
        /* TODO: Remove dc_state->dccg, use dc->dccg directly. */
 
        /* Before powering on DC we need to re-initialize DMUB. */
@@ -6802,7 +6808,7 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc,
        if (!dc_plane_state)
                goto cleanup;
 
-       dc_state = dc_state_create(dc);
+       dc_state = dc_state_create(dc, NULL);
        if (!dc_state)
                goto cleanup;
 
@@ -8857,6 +8863,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,
        struct drm_connector *connector;
        bool mode_set_reset_required = false;
        u32 i;
+       struct dc_commit_streams_params params = {dc_state->streams, dc_state->stream_count};
 
        /* Disable writeback */
        for_each_old_connector_in_state(state, connector, old_con_state, i) {
@@ -8993,7 +9000,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state,
 
        dm_enable_per_frame_crtc_master_sync(dc_state);
        mutex_lock(&dm->dc_lock);
-       WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count));
+       WARN_ON(!dc_commit_streams(dm->dc, &params));
 
        /* Allow idle optimization when vblank count is 0 for display off */
        if (dm->active_vblank_irq_count == 0)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index c3510cdd0ec8f8b63b62750bead14112e701fe7e..f44025eacc0af32015f1fd7d56fc1e738fb2eb99 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1089,8 +1089,7 @@ static bool dc_construct(struct dc *dc,
         * is initialized in dc_create_resource_pool because
         * on creation it copies the contents of dc->dml
         */
-
-       dc->current_state = dc_state_create(dc);
+       dc->current_state = dc_state_create(dc, NULL);
 
        if (!dc->current_state) {
                dm_error("%s: failed to create validate ctx\n", __func__);
@@ -2135,9 +2134,7 @@ static bool commit_minimal_transition_state(struct dc *dc,
  * Return DC_OK if everything work as expected, otherwise, return a dc_status
  * code.
  */
-enum dc_status dc_commit_streams(struct dc *dc,
-                                struct dc_stream_state *streams[],
-                                uint8_t stream_count)
+enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params)
 {
        int i, j;
        struct dc_state *context;
@@ -2146,18 +2143,22 @@ enum dc_status dc_commit_streams(struct dc *dc,
        struct pipe_ctx *pipe;
        bool handle_exit_odm2to1 = false;
 
+       if (!params)
+               return DC_ERROR_UNEXPECTED;
+
        if (dc->ctx->dce_environment == DCE_ENV_VIRTUAL_HW)
                return res;
 
-       if (!streams_changed(dc, streams, stream_count))
+       if (!streams_changed(dc, params->streams, params->stream_count) &&
+                       dc->current_state->power_source == params->power_source)
                return res;
 
        dc_exit_ips_for_hw_access(dc);
 
-       DC_LOG_DC("%s: %d streams\n", __func__, stream_count);
+       DC_LOG_DC("%s: %d streams\n", __func__, params->stream_count);
 
-       for (i = 0; i < stream_count; i++) {
-               struct dc_stream_state *stream = streams[i];
+       for (i = 0; i < params->stream_count; i++) {
+               struct dc_stream_state *stream = params->streams[i];
                struct dc_stream_status *status = dc_stream_get_status(stream);
 
                dc_stream_log(dc, stream);
@@ -2175,7 +2176,7 @@ enum dc_status dc_commit_streams(struct dc *dc,
         * scenario, it uses extra pipes than needed to reduce power consumption
         * We need to switch off this feature to make room for new streams.
         */
-       if (stream_count > dc->current_state->stream_count &&
+       if (params->stream_count > dc->current_state->stream_count &&
                        dc->current_state->stream_count == 1) {
                for (i = 0; i < dc->res_pool->pipe_count; i++) {
                        pipe = &dc->current_state->res_ctx.pipe_ctx[i];
@@ -2191,7 +2192,9 @@ enum dc_status dc_commit_streams(struct dc *dc,
        if (!context)
                goto context_alloc_fail;
 
-       res = dc_validate_with_context(dc, set, stream_count, context, false);
+       context->power_source = params->power_source;
+
+       res = dc_validate_with_context(dc, set, params->stream_count, context, false);
        if (res != DC_OK) {
                BREAK_TO_DEBUGGER();
                goto fail;
@@ -2199,16 +2202,16 @@ enum dc_status dc_commit_streams(struct dc *dc,
 
        res = dc_commit_state_no_check(dc, context);
 
-       for (i = 0; i < stream_count; i++) {
+       for (i = 0; i < params->stream_count; i++) {
                for (j = 0; j < context->stream_count; j++) {
-                       if (streams[i]->stream_id == context->streams[j]->stream_id)
-                               streams[i]->out.otg_offset = context->stream_status[j].primary_otg_inst;
+                       if (params->streams[i]->stream_id == context->streams[j]->stream_id)
+                               params->streams[i]->out.otg_offset = context->stream_status[j].primary_otg_inst;
 
-                       if (dc_is_embedded_signal(streams[i]->signal)) {
-                               struct dc_stream_status *status = dc_state_get_stream_status(context, streams[i]);
+                       if (dc_is_embedded_signal(params->streams[i]->signal)) {
+                               struct dc_stream_status *status = dc_state_get_stream_status(context, params->streams[i]);
 
                                if (dc->hwss.is_abm_supported)
-                                       status->is_abm_supported = dc->hwss.is_abm_supported(dc, context, streams[i]);
+                                       status->is_abm_supported = dc->hwss.is_abm_supported(dc, context, params->streams[i]);
                                else
                                        status->is_abm_supported = true;
                        }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
index d546ea71026dda3f431af8fa2e0004bf471c66ce..d1d326e9b9b687ff0c53db56d813e8502700ce62 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
@@ -188,8 +188,11 @@ static void init_state(struct dc *dc, struct dc_state *state)
 }
 
 /* Public dc_state functions */
-struct dc_state *dc_state_create(struct dc *dc)
+struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params)
 {
+#ifdef CONFIG_DRM_AMD_DC_FP
+       struct dml2_configuration_options dml2_opt = dc->dml2_options;
+#endif
        struct dc_state *state = kvzalloc(sizeof(struct dc_state),
                        GFP_KERNEL);
 
@@ -198,10 +201,16 @@ struct dc_state *dc_state_create(struct dc *dc)
 
        init_state(dc, state);
        dc_state_construct(dc, state);
+       state->power_source = params ? params->power_source : DC_POWER_SOURCE_AC;
 
 #ifdef CONFIG_DRM_AMD_DC_FP
-       if (dc->debug.using_dml2)
-               dml2_create(dc, &dc->dml2_options, &state->bw_ctx.dml2);
+       if (dc->debug.using_dml2) {
+               dml2_opt.use_clock_dc_limits = false;
+               dml2_create(dc, &dml2_opt, &state->bw_ctx.dml2);
+
+               dml2_opt.use_clock_dc_limits = true;
+               dml2_create(dc, &dml2_opt, &state->bw_ctx.dml2_dc_power_source);
+       }
 #endif
 
        kref_init(&state->refcount);
@@ -214,6 +223,7 @@ void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state)
        struct kref refcount = dst_state->refcount;
 #ifdef CONFIG_DRM_AMD_DC_FP
        struct dml2_context *dst_dml2 = dst_state->bw_ctx.dml2;
+       struct dml2_context *dst_dml2_dc_power_source = dst_state->bw_ctx.dml2_dc_power_source;
 #endif
 
        dc_state_copy_internal(dst_state, src_state);
@@ -222,6 +232,10 @@ void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state)
        dst_state->bw_ctx.dml2 = dst_dml2;
        if (src_state->bw_ctx.dml2)
                dml2_copy(dst_state->bw_ctx.dml2, src_state->bw_ctx.dml2);
+
+       dst_state->bw_ctx.dml2_dc_power_source = dst_dml2_dc_power_source;
+       if (src_state->bw_ctx.dml2_dc_power_source)
+               dml2_copy(dst_state->bw_ctx.dml2_dc_power_source, src_state->bw_ctx.dml2_dc_power_source);
 #endif
 
        /* context refcount should not be overridden */
@@ -245,6 +259,12 @@ struct dc_state *dc_state_create_copy(struct dc_state *src_state)
                dc_state_release(new_state);
                return NULL;
        }
+
+       if (src_state->bw_ctx.dml2_dc_power_source &&
+                       !dml2_create_copy(&new_state->bw_ctx.dml2_dc_power_source, src_state->bw_ctx.dml2_dc_power_source)) {
+               dc_state_release(new_state);
+               return NULL;
+       }
 #endif
 
        kref_init(&new_state->refcount);
@@ -326,6 +346,9 @@ static void dc_state_free(struct kref *kref)
 #ifdef CONFIG_DRM_AMD_DC_FP
        dml2_destroy(state->bw_ctx.dml2);
        state->bw_ctx.dml2 = 0;
+
+       dml2_destroy(state->bw_ctx.dml2_dc_power_source);
+       state->bw_ctx.dml2_dc_power_source = 0;
 #endif
 
        kvfree(state);

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index b026004b713abecf374d03904f356a6452ec6a24..4d087137de3b666d0e4a4ab7515d20d45117697a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1504,10 +1504,15 @@ bool dc_acquire_release_mpc_3dlut(
 bool dc_resource_is_dsc_encoding_supported(const struct dc *dc);
 void get_audio_check(struct audio_info *aud_modes,
        struct audio_check *aud_chk);
-
-enum dc_status dc_commit_streams(struct dc *dc,
-                                struct dc_stream_state *streams[],
-                                uint8_t stream_count);
+/*
+ * Set up streams and links associated to drive sinks
+ * The streams parameter is an absolute set of all active streams.
+ *
+ * After this call:
+ *   Phy, Encoder, Timing Generator are programmed and enabled.
+ *   New streams are enabled with blank stream; no memory read.
+ */
+enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params);
 
 
 struct dc_plane_state *dc_get_surface_for_mpcc(struct dc *dc,

diff --git a/drivers/gpu/drm/amd/display/dc/dc_state.h b/drivers/gpu/drm/amd/display/dc/dc_state.h
index a8979c9defe4de3fcd810c2dde5cd3de2dda3ea5..caa45db502329bfe3533dcddda1f3b336a94b7a7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_state.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_state.h
@@ -29,7 +29,7 @@
 #include "dc.h"
 #include "inc/core_status.h"
 
-struct dc_state *dc_state_create(struct dc *dc);
+struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params *params);
 void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state);
 struct dc_state *dc_state_create_copy(struct dc_state *src_state);
 void dc_state_copy_current(struct dc *dc, struct dc_state *dst_state);

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 68dc668f3e14ff9fc4ff71356b66a32a4758a651..e5dbbc6089a5e4b1c1eee3272aa92a79ba1045b0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -427,14 +427,6 @@ bool dc_stream_set_dynamic_metadata(struct dc *dc,
 
 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
 
-/*
- * Set up streams and links associated to drive sinks
- * The streams parameter is an absolute set of all active streams.
- *
- * After this call:
- *   Phy, Encoder, Timing Generator are programmed and enabled.
- *   New streams are enabled with blank stream; no memory read.
- */
 /*
  * Enable stereo when commit_streams is not required,
  * for example, frame alternate.

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index e219a18123608a20f778a76cd910584acf68f207..614d7c27c759646b2ec08a9ca73dbb7103fc0612 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -1175,4 +1175,20 @@ enum mall_stream_type {
        SUBVP_MAIN, // subvp in use, this stream is main stream
        SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream
 };
+
+enum dc_power_source_type {
+       DC_POWER_SOURCE_AC, // wall power
+       DC_POWER_SOURCE_DC, // battery power
+};
+
+struct dc_state_create_params {
+       enum dc_power_source_type power_source;
+};
+
+struct dc_commit_streams_params {
+       struct dc_stream_state **streams;
+       uint8_t stream_count;
+       enum dc_power_source_type power_source;
+};
+
 #endif /* DC_TYPES_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
index 20fd5b8e511728184c5ab6d22e472959422ca540..3760d67af7d5f1807a71748ef897ef880f81dc84 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
@@ -215,6 +215,8 @@ struct dml2_configuration_options {
        unsigned int max_segments_per_hubp;
        unsigned int det_segment_size;
        bool map_dc_pipes_with_callbacks;
+
+       bool use_clock_dc_limits;
 };
 
 /*

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 3f6876aafee09c62e42bf81f7a380308c2e94b4e..3fab7c5bf09325211ef32dbe0b8765e7a5bd1f47 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -518,6 +518,7 @@ struct bw_context {
        union bw_output bw;
        struct display_mode_lib dml;
        struct dml2_context *dml2;
+       struct dml2_context *dml2_dc_power_source;
 };
 
 struct dc_dmub_cmd {
@@ -606,6 +607,8 @@ struct dc_state {
        struct {
                unsigned int stutter_period_us;
        } perf_params;
+
+       enum dc_power_source_type power_source;
 };
 
 struct replay_context {

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
index 61fd0f2e69fe0ba008d5c38e3a085fc4630976ef..e2bff9b9d55ad7f314897892e42c178bcadaffae 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
@@ -1799,7 +1799,9 @@ bool dcn32_validate_bandwidth(struct dc *dc,
        bool out = false;
 
        if (dc->debug.using_dml2)
-               out = dml2_validate(dc, context, context->bw_ctx.dml2, fast_validate);
+               out = dml2_validate(dc, context,
+                               context->power_source == DC_POWER_SOURCE_DC ? context->bw_ctx.dml2_dc_power_source : context->bw_ctx.dml2,
+                               fast_validate);
        else
                out = dml1_validate(dc, context, fast_validate);
        return out;
@@ -1997,10 +1999,20 @@ void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context,
 
 static void dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
 {
+       struct dml2_configuration_options dml2_opt = dc->dml2_options;
+
        DC_FP_START();
+
        dcn32_update_bw_bounding_box_fpu(dc, bw_params);
+
+       dml2_opt.use_clock_dc_limits = false;
        if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2)
-               dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2);
+               dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2);
+
+       dml2_opt.use_clock_dc_limits = true;
+       if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source)
+               dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source);
+
        DC_FP_END();
 }
 

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
index f7339b1419396831a708d0a12ec790a7cfdbf908..3816678b044f512b26880a5c30fef72b335f982c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
@@ -1579,10 +1579,20 @@ static struct dc_cap_funcs cap_funcs = {
 
 static void dcn321_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
 {
+       struct dml2_configuration_options dml2_opt = dc->dml2_options;
+
        DC_FP_START();
+
        dcn321_update_bw_bounding_box_fpu(dc, bw_params);
+
+       dml2_opt.use_clock_dc_limits = false;
        if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2)
-               dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2);
+               dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2);
+
+       dml2_opt.use_clock_dc_limits = true;
+       if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source)
+               dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source);
+
        DC_FP_END();
 }
 

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
index e0544484e8c07073347b75c09bbbe8d1be3ed5a7..25ac450944e74a67f3218bda474f41adfcba5626 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
@@ -1734,7 +1734,9 @@ static bool dcn35_validate_bandwidth(struct dc *dc,
 {
        bool out = false;
 
-       out = dml2_validate(dc, context, context->bw_ctx.dml2, fast_validate);
+       out = dml2_validate(dc, context,
+                       context->power_source == DC_POWER_SOURCE_DC ? context->bw_ctx.dml2_dc_power_source : context->bw_ctx.dml2,
+                       fast_validate);
 
        if (fast_validate)
                return out;

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
index 690e1ade361e6a35c73bb1e3d3d8a291f90adbbc..66ab6aba26aad0f6c307edd1d02b2a14982f997e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
@@ -1714,7 +1714,9 @@ static bool dcn351_validate_bandwidth(struct dc *dc,
 {
        bool out = false;
 
-       out = dml2_validate(dc, context, context->bw_ctx.dml2, fast_validate);
+       out = dml2_validate(dc, context,
+                       context->power_source == DC_POWER_SOURCE_DC ? context->bw_ctx.dml2_dc_power_source : context->bw_ctx.dml2,
+                       fast_validate);
 
        if (fast_validate)
                return out;