drm/amd/display: Pass sequential ONO bit to DMCUB boot options

[Why]
IPS ono sequence ordering differs based on the ASIC.

[How]
Detect the ASIC ID revision and set the boot option accordingly. Feed
it through the DCN35 DMUB functions.

Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4d9a76446df876e1c39384cceb9d328b936cc1a0..75c78f6e2fdededfe8eca0bd117eb5e9117759a3 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1230,6 +1230,15 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
                break;
        }
 
+       switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
+       case IP_VERSION(3, 5, 0):
+       case IP_VERSION(3, 5, 1):
+               hw_params.ips_sequential_ono = adev->external_rev_id > 0x10;
+               break;
+       default:
+               break;
+       }
+
        status = dmub_srv_hw_init(dmub_srv, &hw_params);
        if (status != DMUB_STATUS_OK) {
                DRM_ERROR("Error initializing DMUB HW: %d\n", status);

diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index 662bdb0e5d3dd1c52d09632888cb41a6e38d382d..2fde1f043d5059e1ce91ac3059ee02572c5888fc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -297,6 +297,7 @@ struct dmub_srv_hw_params {
        bool dpia_hpd_int_enable_supported;
        bool disable_clock_gate;
        bool disallow_dispclk_dppclk_ds;
+       bool ips_sequential_ono;
        enum dmub_memory_access_type mem_access_type;
        enum dmub_ips_disable_type disable_ips;
 };

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
index 98afaecd3984ac65d4f62fe335a32ffa38c677f1..70e63aeb8f89b1da59189fd315fe14623915a174 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
@@ -420,6 +420,7 @@ void dmub_dcn35_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu
        boot_options.bits.disable_clk_ds = params->disallow_dispclk_dppclk_ds;
        boot_options.bits.disable_clk_gate = params->disable_clock_gate;
        boot_options.bits.ips_disable = params->disable_ips;
+       boot_options.bits.ips_sequential_ono = params->ips_sequential_ono;
 
        REG_WRITE(DMCUB_SCRATCH14, boot_options.all);
 }