drm/amdgpu/psp: set boot_time_tmr flag

Set boot_time_tmr flag for the ASIC which MP0 ip version
newer than 14.0.2
For runtime TMR:
     Init tmr and load tmr should did.
For boottime TMR:
     If do not support autoload, skip init TMR.
     If support autoload, excute init TMR but skip load tmr.

v2: rebase (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 4755c63ae69a8c610dec18312bff778fbf19046b..1a39ea9adc36141e81971a9bd5b12fdb75e71a65 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -822,7 +822,7 @@ static int psp_tmr_init(struct psp_context *psp)
                }
        }
 
-       if (!psp->tmr_bo) {
+       if (!psp->tmr_bo && !psp->boot_time_tmr) {
                pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
                ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,
                                              PSP_TMR_ALIGNMENT,
@@ -2258,7 +2258,7 @@ static int psp_hw_start(struct psp_context *psp)
        if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
                goto skip_pin_bo;
 
-       if (!psp->boot_time_tmr) {
+       if (!psp->boot_time_tmr || psp->autoload_supported) {
                ret = psp_tmr_init(psp);
                if (ret) {
                        dev_err(adev->dev, "PSP tmr init failed!\n");
@@ -2278,10 +2278,12 @@ skip_pin_bo:
                        return ret;
        }
 
-       ret = psp_tmr_load(psp);
-       if (ret) {
-               dev_err(adev->dev, "PSP load tmr failed!\n");
-               return ret;
+       if (!psp->boot_time_tmr || !psp->autoload_supported) {
+               ret = psp_tmr_load(psp);
+               if (ret) {
+                       dev_err(adev->dev, "PSP load tmr failed!\n");
+                       return ret;
+               }
        }
 
        return 0;