{
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 80,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 250,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 500,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        {
                .name = "C1E",
                .desc = "MWAIT 0x01",
-               .flags = MWAIT2flg(0x01),
+               .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
                .exit_latency = 10,
                .target_residency = 20,
                .enter = &intel_idle,
        .disable_promotion_to_c1e = true,
 };
 
+static const struct idle_cpu idle_cpu_nhx = {
+       .state_table = nehalem_cstates,
+       .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
+       .disable_promotion_to_c1e = true,
+       .use_acpi = true,
+};
+
 static const struct idle_cpu idle_cpu_atom = {
        .state_table = atom_cstates,
 };
        .disable_promotion_to_c1e = true,
 };
 
+static const struct idle_cpu idle_cpu_snx = {
+       .state_table = snb_cstates,
+       .disable_promotion_to_c1e = true,
+       .use_acpi = true,
+};
+
 static const struct idle_cpu idle_cpu_byt = {
        .state_table = byt_cstates,
        .disable_promotion_to_c1e = true,
 static const struct idle_cpu idle_cpu_ivt = {
        .state_table = ivt_cstates,
        .disable_promotion_to_c1e = true,
+       .use_acpi = true,
 };
 
 static const struct idle_cpu idle_cpu_hsw = {
        .disable_promotion_to_c1e = true,
 };
 
+static const struct idle_cpu idle_cpu_hsx = {
+       .state_table = hsw_cstates,
+       .disable_promotion_to_c1e = true,
+       .use_acpi = true,
+};
+
 static const struct idle_cpu idle_cpu_bdw = {
        .state_table = bdw_cstates,
        .disable_promotion_to_c1e = true,
 };
 
+static const struct idle_cpu idle_cpu_bdx = {
+       .state_table = bdw_cstates,
+       .disable_promotion_to_c1e = true,
+       .use_acpi = true,
+};
+
 static const struct idle_cpu idle_cpu_skl = {
        .state_table = skl_cstates,
        .disable_promotion_to_c1e = true,
 static const struct idle_cpu idle_cpu_skx = {
        .state_table = skx_cstates,
        .disable_promotion_to_c1e = true,
+       .use_acpi = true,
 };
 
 static const struct idle_cpu idle_cpu_avn = {
        .state_table = avn_cstates,
        .disable_promotion_to_c1e = true,
+       .use_acpi = true,
 };
 
 static const struct idle_cpu idle_cpu_knl = {
        .state_table = knl_cstates,
+       .use_acpi = true,
 };
 
 static const struct idle_cpu idle_cpu_bxt = {
 static const struct idle_cpu idle_cpu_dnv = {
        .state_table = dnv_cstates,
        .disable_promotion_to_c1e = true,
+       .use_acpi = true,
 };
 
 static const struct x86_cpu_id intel_idle_ids[] __initconst = {
-       INTEL_CPU_FAM6(NEHALEM_EP,              idle_cpu_nehalem),
+       INTEL_CPU_FAM6(NEHALEM_EP,              idle_cpu_nhx),
        INTEL_CPU_FAM6(NEHALEM,                 idle_cpu_nehalem),
        INTEL_CPU_FAM6(NEHALEM_G,               idle_cpu_nehalem),
        INTEL_CPU_FAM6(WESTMERE,                idle_cpu_nehalem),
-       INTEL_CPU_FAM6(WESTMERE_EP,             idle_cpu_nehalem),
-       INTEL_CPU_FAM6(NEHALEM_EX,              idle_cpu_nehalem),
+       INTEL_CPU_FAM6(WESTMERE_EP,             idle_cpu_nhx),
+       INTEL_CPU_FAM6(NEHALEM_EX,              idle_cpu_nhx),
        INTEL_CPU_FAM6(ATOM_BONNELL,            idle_cpu_atom),
        INTEL_CPU_FAM6(ATOM_BONNELL_MID,        idle_cpu_lincroft),
-       INTEL_CPU_FAM6(WESTMERE_EX,             idle_cpu_nehalem),
+       INTEL_CPU_FAM6(WESTMERE_EX,             idle_cpu_nhx),
        INTEL_CPU_FAM6(SANDYBRIDGE,             idle_cpu_snb),
-       INTEL_CPU_FAM6(SANDYBRIDGE_X,           idle_cpu_snb),
+       INTEL_CPU_FAM6(SANDYBRIDGE_X,           idle_cpu_snx),
        INTEL_CPU_FAM6(ATOM_SALTWELL,           idle_cpu_atom),
        INTEL_CPU_FAM6(ATOM_SILVERMONT,         idle_cpu_byt),
        INTEL_CPU_FAM6(ATOM_SILVERMONT_MID,     idle_cpu_tangier),
        INTEL_CPU_FAM6(IVYBRIDGE,               idle_cpu_ivb),
        INTEL_CPU_FAM6(IVYBRIDGE_X,             idle_cpu_ivt),
        INTEL_CPU_FAM6(HASWELL,                 idle_cpu_hsw),
-       INTEL_CPU_FAM6(HASWELL_X,               idle_cpu_hsw),
+       INTEL_CPU_FAM6(HASWELL_X,               idle_cpu_hsx),
        INTEL_CPU_FAM6(HASWELL_L,               idle_cpu_hsw),
        INTEL_CPU_FAM6(HASWELL_G,               idle_cpu_hsw),
        INTEL_CPU_FAM6(ATOM_SILVERMONT_D,       idle_cpu_avn),
        INTEL_CPU_FAM6(BROADWELL,               idle_cpu_bdw),
        INTEL_CPU_FAM6(BROADWELL_G,             idle_cpu_bdw),
-       INTEL_CPU_FAM6(BROADWELL_X,             idle_cpu_bdw),
-       INTEL_CPU_FAM6(BROADWELL_D,             idle_cpu_bdw),
+       INTEL_CPU_FAM6(BROADWELL_X,             idle_cpu_bdx),
+       INTEL_CPU_FAM6(BROADWELL_D,             idle_cpu_bdx),
        INTEL_CPU_FAM6(SKYLAKE_L,               idle_cpu_skl),
        INTEL_CPU_FAM6(SKYLAKE,                 idle_cpu_skl),
        INTEL_CPU_FAM6(KABYLAKE_L,              idle_cpu_skl),