powerpc: dts: t1040rdb: add ports for Seville Ethernet switch

Define the network interface names for the switch ports and hook them up
to the 2 QSGMII PHYs that are onboard.

A conscious decision was taken to go along with the numbers that are
written on the front panel of the board and not with the hardware
numbers of the switch chip ports.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Maxim Kochetkov <fido_max@inbox.ru>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
index 65ff34c4902569650fa2957f1fd62e2514b84eef..af0c8a6f561385ce9fcf9f24a4effccf9df21fe2 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
@@ -64,6 +64,40 @@
                                phy_sgmii_2: ethernet-phy@3 {
                                        reg = <0x03>;
                                };
+
+                               /* VSC8514 QSGMII PHY */
+                               phy_qsgmii_0: ethernet-phy@4 {
+                                       reg = <0x4>;
+                               };
+
+                               phy_qsgmii_1: ethernet-phy@5 {
+                                       reg = <0x5>;
+                               };
+
+                               phy_qsgmii_2: ethernet-phy@6 {
+                                       reg = <0x6>;
+                               };
+
+                               phy_qsgmii_3: ethernet-phy@7 {
+                                       reg = <0x7>;
+                               };
+
+                               /* VSC8514 QSGMII PHY */
+                               phy_qsgmii_4: ethernet-phy@8 {
+                                       reg = <0x8>;
+                               };
+
+                               phy_qsgmii_5: ethernet-phy@9 {
+                                       reg = <0x9>;
+                               };
+
+                               phy_qsgmii_6: ethernet-phy@a {
+                                       reg = <0xa>;
+                               };
+
+                               phy_qsgmii_7: ethernet-phy@b {
+                                       reg = <0xb>;
+                               };
                        };
                };
        };
@@ -76,3 +110,76 @@
 };
 
 #include "t1040si-post.dtsi"
+
+&seville_switch {
+       status = "okay";
+};
+
+&seville_port0 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_0>;
+       phy-mode = "qsgmii";
+       label = "ETH5";
+       status = "okay";
+};
+
+&seville_port1 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_1>;
+       phy-mode = "qsgmii";
+       label = "ETH4";
+       status = "okay";
+};
+
+&seville_port2 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_2>;
+       phy-mode = "qsgmii";
+       label = "ETH7";
+       status = "okay";
+};
+
+&seville_port3 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_3>;
+       phy-mode = "qsgmii";
+       label = "ETH6";
+       status = "okay";
+};
+
+&seville_port4 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_4>;
+       phy-mode = "qsgmii";
+       label = "ETH9";
+       status = "okay";
+};
+
+&seville_port5 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_5>;
+       phy-mode = "qsgmii";
+       label = "ETH8";
+       status = "okay";
+};
+
+&seville_port6 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_6>;
+       phy-mode = "qsgmii";
+       label = "ETH11";
+       status = "okay";
+};
+
+&seville_port7 {
+       managed = "in-band-status";
+       phy-handle = <&phy_qsgmii_7>;
+       phy-mode = "qsgmii";
+       label = "ETH10";
+       status = "okay";
+};
+
+&seville_port8 {
+       ethernet = <&enet0>;
+       status = "okay";
+};