unsigned scp_clk_refcount;
 
        struct dss_lcd_mgr_config mgr_config;
+       struct omap_video_timings timings;
 };
 
 struct dsi_packet_sent_handler_data {
        int num_line_buffers;
 
        if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) {
+               struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
                int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt);
                unsigned line_buf_size = dsi_get_line_buf_size(dsidev);
-               struct omap_video_timings *timings = &dssdev->panel.timings;
+               struct omap_video_timings *timings = &dsi->timings;
                /*
                 * Don't use line buffers if width is greater than the video
                 * port's line buffer size
        int ddr_clk_pre, ddr_clk_post, enter_hs_mode_lat, exit_hs_mode_lat;
        int tclk_trail, ths_exit, exiths_clk;
        bool ddr_alwon;
-       struct omap_video_timings *timings = &dssdev->panel.timings;
+       struct omap_video_timings *timings = &dsi->timings;
        int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt);
        int ndl = dsi->num_lanes_used - 1;
        int dsi_fclk_hsdiv = dssdev->clocks.dsi.regm_dsi + 1;
                int vbp = dssdev->panel.dsi_vm_data.vbp;
                int window_sync = dssdev->panel.dsi_vm_data.window_sync;
                bool hsync_end = dssdev->panel.dsi_vm_data.vp_hsync_end;
-               struct omap_video_timings *timings = &dssdev->panel.timings;
+               struct omap_video_timings *timings = &dsi->timings;
                int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt);
                int tl, t_he, width_bytes;
 
 int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel)
 {
        struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
+       struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
        int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt);
        u8 data_type;
        u16 word_count;
                /* MODE, 1 = video mode */
                REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), 1, 4, 4);
 
-               word_count = DIV_ROUND_UP(dssdev->panel.timings.x_res * bpp, 8);
+               word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8);
 
                dsi_vc_write_long_header(dsidev, channel, data_type,
                                word_count, 0);
 {
        struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
        struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
-       struct omap_video_timings timings;
        int r;
        u32 irq = 0;
 
 
                dssdev->driver->get_resolution(dssdev, &dw, &dh);
 
-               timings.x_res = dw;
-               timings.y_res = dh;
-               timings.hsw = 1;
-               timings.hfp = 1;
-               timings.hbp = 1;
-               timings.vsw = 1;
-               timings.vfp = 0;
-               timings.vbp = 0;
+               dsi->timings.x_res = dw;
+               dsi->timings.y_res = dh;
+               dsi->timings.hsw = 1;
+               dsi->timings.hfp = 1;
+               dsi->timings.hbp = 1;
+               dsi->timings.vsw = 1;
+               dsi->timings.vfp = 0;
+               dsi->timings.vbp = 0;
 
                irq = dispc_mgr_get_framedone_irq(dssdev->manager->id);
 
                dsi->mgr_config.stallmode = true;
                dsi->mgr_config.fifohandcheck = true;
        } else {
-               timings = dssdev->panel.timings;
-
                dsi->mgr_config.stallmode = false;
                dsi->mgr_config.fifohandcheck = false;
        }
         * override interlace, logic level and edge related parameters in
         * omap_video_timings with default values
         */
-       timings.interlace = false;
-       timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
-       timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
-       timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
-       timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
-       timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
+       dsi->timings.interlace = false;
+       dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
+       dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
+       dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
+       dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
+       dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
 
-       dss_mgr_set_timings(dssdev->manager, &timings);
+       dss_mgr_set_timings(dssdev->manager, &dsi->timings);
 
        r = dsi_configure_dispc_clocks(dssdev);
        if (r)
 }
 EXPORT_SYMBOL(omapdss_dsi_enable_te);
 
+void omapdss_dsi_set_timings(struct omap_dss_device *dssdev,
+               struct omap_video_timings *timings)
+{
+       struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
+       struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
+
+       mutex_lock(&dsi->lock);
+
+       dsi->timings = *timings;
+
+       mutex_unlock(&dsi->lock);
+}
+EXPORT_SYMBOL(omapdss_dsi_set_timings);
+
 static int __init dsi_init_display(struct omap_dss_device *dssdev)
 {
        struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);