powerpc/sstep: Introduce GETTYPE macro

Replace 'op->type & INSTR_TYPE_MASK' expression with GETTYPE(op->type)
macro.

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/sstep.h b/arch/powerpc/include/asm/sstep.h
index ab9d849644d05d9662445b6d30a74a6419ad55ad..4547891a684be0a3f697d877c2b14fda10dd8a93 100644 (file)
--- a/arch/powerpc/include/asm/sstep.h
+++ b/arch/powerpc/include/asm/sstep.h
@@ -97,6 +97,8 @@ enum instruction_type {
 #define SIZE(n)                ((n) << 12)
 #define GETSIZE(w)     ((w) >> 12)
 
+#define GETTYPE(t)     ((t) & INSTR_TYPE_MASK)
+
 #define MKOP(t, f, s)  ((t) | (f) | SIZE(s))
 
 struct instruction_op {

diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 3e6c0744c174a0dc7479219b07c3b4cc26cdd68d..11550a3d1ac2e8c5cf092de7f4a849d4a3439d32 100644 (file)
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -339,7 +339,7 @@ int fix_alignment(struct pt_regs *regs)
        if (r < 0)
                return -EINVAL;
 
-       type = op.type & INSTR_TYPE_MASK;
+       type = GETTYPE(op.type);
        if (!OP_IS_LOAD_STORE(type)) {
                if (op.type != CACHEOP + DCBZ)
                        return -EINVAL;

diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 49427a3ee104582cd2a98f6876bc42006354b43a..f18d70449255bb525d4b43ffafaeac917f724188 100644 (file)
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -2642,7 +2642,7 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op)
        unsigned long next_pc;
 
        next_pc = truncate_if_32bit(regs->msr, regs->nip + 4);
-       switch (op->type & INSTR_TYPE_MASK) {
+       switch (GETTYPE(op->type)) {
        case COMPUTE:
                if (op->type & SETREG)
                        regs->gpr[op->reg] = op->val;
@@ -2740,7 +2740,7 @@ int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op)
 
        err = 0;
        size = GETSIZE(op->type);
-       type = op->type & INSTR_TYPE_MASK;
+       type = GETTYPE(op->type);
        cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE);
        ea = truncate_if_32bit(regs->msr, op->ea);
 
@@ -3002,7 +3002,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
        }
 
        err = 0;
-       type = op.type & INSTR_TYPE_MASK;
+       type = GETTYPE(op.type);
 
        if (OP_IS_LOAD_STORE(type)) {
                err = emulate_loadstore(regs, &op);