drm/i915/dram: split out pnv DDR3 detection

Split out the PNV DDR3 detection to a distinct step instead of
conflating it with mem freq detection.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c4bf9d32479ab5024e9daa37a996508f543f05e9.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 3dce9b9a2c5e17c1634ab7b186060e8dbc8d9aac..1a4db52ac2581f3e4e97f3a17d4c7fa0167978e5 100644 (file)
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -43,6 +43,11 @@ static const char *intel_dram_type_str(enum intel_dram_type type)
 
 #undef DRAM_TYPE_STR
 
+static bool pnv_is_ddr3(struct drm_i915_private *i915)
+{
+       return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3;
+}
+
 static void pnv_detect_mem_freq(struct drm_i915_private *dev_priv)
 {
        u32 tmp;
@@ -60,10 +65,6 @@ static void pnv_detect_mem_freq(struct drm_i915_private *dev_priv)
                dev_priv->mem_freq = 800;
                break;
        }
-
-       /* detect pineview DDR3 setting */
-       tmp = intel_uncore_read(&dev_priv->uncore, CSHRDDR3CTL);
-       dev_priv->is_ddr3 = (tmp & CSHRDDR3CTL_DDR3) ? 1 : 0;
 }
 
 static void ilk_detect_mem_freq(struct drm_i915_private *dev_priv)
@@ -143,6 +144,9 @@ static void detect_mem_freq(struct drm_i915_private *i915)
        else if (IS_VALLEYVIEW(i915))
                vlv_detect_mem_freq(i915);
 
+       if (IS_PINEVIEW(i915))
+               i915->is_ddr3 = pnv_is_ddr3(i915);
+
        if (i915->mem_freq)
                drm_dbg(&i915->drm, "DDR speed: %d MHz\n", i915->mem_freq);
 }