#clock-cells = <1>;
        };
 
-       syscfg_pctl_a: syscfg_pctl_a@10005000 {
+       syscfg_pctl_a: syscon@10005000 {
                compatible = "mediatek,mt2712-pctl-a-syscfg", "syscon";
                reg = <0 0x10005000 0 0x1000>;
        };
 
                #clock-cells = <1>;
        };
 
-       infrasys: infracfg_ao@10001000 {
+       infrasys: syscon@10001000 {
                compatible = "mediatek,mt6797-infracfg", "syscon";
                reg = <0 0x10001000 0 0x1000>;
                #clock-cells = <1>;
                #clock-cells = <1>;
        };
 
-       imgsys: imgsys_config@15000000  {
+       imgsys: syscon@15000000  {
                compatible = "mediatek,mt6797-imgsys", "syscon";
                reg = <0 0x15000000 0 0x1000>;
                #clock-cells = <1>;
        };
 
-       vdecsys: vdec_gcon@16000000 {
+       vdecsys: syscon@16000000 {
                compatible = "mediatek,mt6797-vdecsys", "syscon";
                reg = <0 0x16000000 0 0x10000>;
                #clock-cells = <1>;
        };
 
-       vencsys: venc_gcon@17000000 {
+       vencsys: syscon@17000000 {
                compatible = "mediatek,mt6797-vencsys", "syscon";
                reg = <0 0x17000000 0 0x1000>;
                #clock-cells = <1>;
 
                __overlay__ {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       spi_nand: spi_nand@0 {
+                       spi_nand: flash@0 {
                                compatible = "spi-nand";
                                reg = <0>;
                                spi-max-frequency = <10000000>;
 
 
 &cpu_thermal {
        trips {
-               cpu_crit: cpu_crit0 {
+               cpu_crit: cpu-crit0 {
                        temperature = <100000>;
                        type = "critical";
                };
 
                        compatible = "mediatek,mt6397-rtc";
                };
 
-               syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
+               syscfg_pctl_pmic: syscon@c000 {
                        compatible = "mediatek,mt6397-pctl-pmic-syscfg",
                                     "syscon";
                        reg = <0 0x0000c000 0 0x0108>;
 
                };
        };
 
-       pmu_a53 {
+       pmu-a53 {
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>,
                             <GIC_SPI 9 IRQ_TYPE_LEVEL_LOW>;
                interrupt-affinity = <&cpu0>, <&cpu1>;
        };
 
-       pmu_a72 {
+       pmu-a72 {
                compatible = "arm,cortex-a72-pmu";
                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_LOW>,
                             <GIC_SPI 13 IRQ_TYPE_LEVEL_LOW>;
                                        type = "passive";
                                };
 
-                               cpu_crit: cpu_crit0 {
+                               cpu_crit: cpu-crit0 {
                                        temperature = <115000>;
                                        hysteresis = <2000>;
                                        type = "critical";
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
-               vpu_dma_reserved: vpu_dma_mem_region@b7000000 {
+               vpu_dma_reserved: vpu-dma-mem@b7000000 {
                        compatible = "shared-dma-pool";
                        reg = <0 0xb7000000 0 0x500000>;
                        alignment = <0x1000>;
                        #reset-cells = <1>;
                };
 
-               syscfg_pctl_a: syscfg_pctl_a@10005000 {
+               syscfg_pctl_a: syscon@10005000 {
                        compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
                        reg = <0 0x10005000 0 0x1000>;
                };
 
                #size-cells = <2>;
                ranges;
 
-               scp_mem_reserved: scp_mem_region@50000000 {
+               scp_mem_reserved: scp-mem@50000000 {
                        compatible = "shared-dma-pool";
                        reg = <0 0x50000000 0 0x2900000>;
                        no-map;
 
                        power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
                };
 
-               venc_jpg: venc_jpg@17030000 {
+               venc_jpg: jpeg-encoder@17030000 {
                        compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";
                        reg = <0 0x17030000 0 0x1000>;
                        interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;