According to the XDMA datasheet (PG195), the address of any descriptor
must be 32 byte aligned. The datasheet also states that a contiguous
block of descriptors must not cross a 4k address boundary. Therefore,
it is possible to ease the pressure put on the dma_pool allocator
just by requiring sufficient alignment and boundary values. Add proper
macro definition and change the values passed into the
dma_pool_create().
Signed-off-by: Jan Kuliga <jankul@alatek.krakow.pl>
Link: https://lore.kernel.org/r/20231218113943.9099-4-jankul@alatek.krakow.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 
        __le64          next_desc;
 };
 
-#define XDMA_DESC_SIZE         sizeof(struct xdma_hw_desc)
-#define XDMA_DESC_BLOCK_SIZE   (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT)
-#define XDMA_DESC_BLOCK_ALIGN  4096
+#define XDMA_DESC_SIZE                 sizeof(struct xdma_hw_desc)
+#define XDMA_DESC_BLOCK_SIZE           (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT)
+#define XDMA_DESC_BLOCK_ALIGN          32
+#define XDMA_DESC_BLOCK_BOUNDARY       4096
 
 /*
  * Channel registers
 
                return -EINVAL;
        }
 
-       xdma_chan->desc_pool = dma_pool_create(dma_chan_name(chan),
-                                              dev, XDMA_DESC_BLOCK_SIZE,
-                                              XDMA_DESC_BLOCK_ALIGN, 0);
+       xdma_chan->desc_pool = dma_pool_create(dma_chan_name(chan), dev, XDMA_DESC_BLOCK_SIZE,
+                                              XDMA_DESC_BLOCK_ALIGN, XDMA_DESC_BLOCK_BOUNDARY);
        if (!xdma_chan->desc_pool) {
                xdma_err(xdev, "unable to allocate descriptor pool");
                return -ENOMEM;