net/mlx5: Correct TASR typo into TSAR

TSAR is the correct spelling (Transmit Scheduling ARbiter).

Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Gal Pressman <gal@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://lore.kernel.org/r/20240613210036.1125203-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
index d2ebe56c3977cc2ec401197dafe87ce007438a35..20146a2dc7f42baffbb3807b0017b445e7e5a1f0 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
@@ -531,7 +531,7 @@ static bool esw_qos_element_type_supported(struct mlx5_core_dev *dev, int type)
        switch (type) {
        case SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR:
                return MLX5_CAP_QOS(dev, esw_element_type) &
-                      ELEMENT_TYPE_CAP_MASK_TASR;
+                      ELEMENT_TYPE_CAP_MASK_TSAR;
        case SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT:
                return MLX5_CAP_QOS(dev, esw_element_type) &
                       ELEMENT_TYPE_CAP_MASK_VPORT;

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 17acd0f3ca8ed543774ae32a62a6d594bad63366..466dcda40bb5c384d2fc6db5422f7dbd797033a4 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -3914,7 +3914,7 @@ enum {
 };
 
 enum {
-       ELEMENT_TYPE_CAP_MASK_TASR              = 1 << 0,
+       ELEMENT_TYPE_CAP_MASK_TSAR              = 1 << 0,
        ELEMENT_TYPE_CAP_MASK_VPORT             = 1 << 1,
        ELEMENT_TYPE_CAP_MASK_VPORT_TC          = 1 << 2,
        ELEMENT_TYPE_CAP_MASK_PARA_VPORT_TC     = 1 << 3,