clk: renesas: r9a07g044: Mark resets array as const

The r9a07g044_resets array describes the reset signals in this SoC and
does not change at runtime.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240320082831.9666-2-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index 48404cafea3f51d3b01c86835b9cae8032c383fa..f6df3f7a31b546e46c14beb08fb63476dbf5a8c3 100644 (file)
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -368,7 +368,7 @@ static const struct {
 #endif
 };
 
-static struct rzg2l_reset r9a07g044_resets[] = {
+static const struct rzg2l_reset r9a07g044_resets[] = {
        DEF_RST(R9A07G044_GIC600_GICRESET_N, 0x814, 0),
        DEF_RST(R9A07G044_GIC600_DBG_GICRESET_N, 0x814, 1),
        DEF_RST(R9A07G044_IA55_RESETN, 0x818, 0),