Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
                        continue;
 
                if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX && amdgpu_sriov_vf(adev)) {
-                       if (chunk_ib->flags & AMDGPU_IB_FLAG_PREEMPT)
+                       if (chunk_ib->flags & AMDGPU_IB_FLAG_PREEMPT) {
                                if (chunk_ib->flags & AMDGPU_IB_FLAG_CE)
                                        ce_preempt++;
                                else
                                        de_preempt++;
+                       }
 
                        /* each GFX command submit allows 0 or 1 IB preemptible for CE & DE */
                        if (ce_preempt > 1 || de_preempt > 1)
 
        if (ring->funcs->init_cond_exec)
                patch_offset = amdgpu_ring_init_cond_exec(ring);
 
-               if (ring->funcs->emit_hdp_flush
+       if (ring->funcs->emit_hdp_flush
 #ifdef CONFIG_X86_64
            && !(adev->flags & AMD_IS_APU)
 #endif