mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
                                                  fb_tiled);
        domain = amdgpu_display_supported_domains(adev);
-
        height = ALIGN(mode_cmd->height, 8);
        size = mode_cmd->pitches[0] * height;
        aligned_size = ALIGN(size, PAGE_SIZE);
        ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
                                       AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-                                      AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
-                                      AMDGPU_GEM_CREATE_VRAM_CLEARED,
+                                      AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS     |
+                                      AMDGPU_GEM_CREATE_VRAM_CLEARED        |
+                                      AMDGPU_GEM_CREATE_CPU_GTT_USWC,
                                       ttm_bo_type_kernel, NULL, &gobj);
        if (ret) {
                pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
                        dev_err(adev->dev, "FB failed to set tiling flags\n");
        }
 
-
        ret = amdgpu_bo_pin(abo, domain);
        if (ret) {
                amdgpu_bo_unreserve(abo);
 
        struct amdgpu_device *adev = dev->dev_private;
        struct drm_gem_object *gobj;
        uint32_t handle;
-       u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
+       u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                   AMDGPU_GEM_CREATE_CPU_GTT_USWC;
        u32 domain;
        int r;