arm64: dts: rockchip: add rx0 mipi-phy for rk3399

Designware MIPI D-PHY, used for ISP0 in rk3399.

Verified with:
make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20200403161538.1375908-9-helen.koike@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 781b5c2cdb4de68beed21d677909540af8ab902d..f2ef0d8ba54b595488635ed8d40edfc0105f272d 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1397,6 +1397,17 @@
                        status = "disabled";
                };
 
+               mipi_dphy_rx0: mipi-dphy-rx0 {
+                       compatible = "rockchip,rk3399-mipi-dphy-rx0";
+                       clocks = <&cru SCLK_MIPIDPHY_REF>,
+                                <&cru SCLK_DPHY_RX0_CFG>,
+                                <&cru PCLK_VIO_GRF>;
+                       clock-names = "dphy-ref", "dphy-cfg", "grf";
+                       power-domains = <&power RK3399_PD_VIO>;
+                       #phy-cells = <0>;
+                       status = "disabled";
+               };
+
                u2phy0: usb2-phy@e450 {
                        compatible = "rockchip,rk3399-usb2phy";
                        reg = <0xe450 0x10>;