Temporarily disable dchubbub clock gating, registers:
.DISPCLK_R_DCHUBBUB_GATE_DIS
.DCFCLK_R_DCHUBBUB_GATE_DIS
need to follow up with sequence issue.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Leo Chen <sanchuan.chen@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
.disable_dcc = DCC_ENABLE,
.disable_dpp_power_gate = true,
.disable_hubp_power_gate = true,
+ .disable_clock_gate = true,
.disable_dsc_power_gate = true,
.vsr_support = true,
.performance_trace = false,