drm/i915: pass dev_priv explicitly to TRANS_SET_CONTEXT_LATENCY

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_SET_CONTEXT_LATENCY register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/989f89994edae0829e3b6d5d6e3d8a521f0eda00.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 62f8300c73a529c9915129053324c89da5ee11a5..c608329dac420c7d6c1a771046f8b65c6c534889 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2703,7 +2703,8 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
         * TRANS_SET_CONTEXT_LATENCY to configure the pipe vblank start.
         */
        if (DISPLAY_VER(dev_priv) >= 13) {
-               intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder),
+               intel_de_write(dev_priv,
+                              TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder),
                               crtc_vblank_start - crtc_vdisplay);
 
                /*
@@ -2860,7 +2861,8 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc,
        if (DISPLAY_VER(dev_priv) >= 13 && !transcoder_is_dsi(cpu_transcoder))
                adjusted_mode->crtc_vblank_start =
                        adjusted_mode->crtc_vdisplay +
-                       intel_de_read(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder));
+                       intel_de_read(dev_priv,
+                                     TRANS_SET_CONTEXT_LATENCY(dev_priv, cpu_transcoder));
 }
 
 static void intel_bigjoiner_adjust_pipe_src(struct intel_crtc_state *crtc_state)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 637b446afb82538caf699fe9c7f184cb083904ec..7d68f6806e5bef497fe161ee94b4fa269506618d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4155,7 +4155,7 @@ enum skl_power_gate {
 #define _TRANS_B_SET_CONTEXT_LATENCY           0x6107C
 #define _TRANS_C_SET_CONTEXT_LATENCY           0x6207C
 #define _TRANS_D_SET_CONTEXT_LATENCY           0x6307C
-#define TRANS_SET_CONTEXT_LATENCY(tran)                _MMIO_TRANS2(dev_priv, tran, _TRANS_A_SET_CONTEXT_LATENCY)
+#define TRANS_SET_CONTEXT_LATENCY(dev_priv, tran)              _MMIO_TRANS2(dev_priv, tran, _TRANS_A_SET_CONTEXT_LATENCY)
 #define  TRANS_SET_CONTEXT_LATENCY_MASK                REG_GENMASK(15, 0)
 #define  TRANS_SET_CONTEXT_LATENCY_VALUE(x)    REG_FIELD_PREP(TRANS_SET_CONTEXT_LATENCY_MASK, (x))