drm/amd/pm: apply dummy reads workaround for CDR enabled only

For CDR disabled case, the dummy reads workaround is not needed.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index a027c7fdad56f6ec3147f7ecccc7bc405a825fe8..846c9c98e8b6a92dfa4e8ec242d5e83c125d36ba 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2303,10 +2303,12 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
                if (umc_fw_greater_than_v136)
                        return 0;
 
-               if (umc_fw_disable_cdr && adev->asic_type == CHIP_NAVI10)
-                       return navi10_umc_hybrid_cdr_workaround(smu);
-               else
+               if (umc_fw_disable_cdr) {
+                       if (adev->asic_type == CHIP_NAVI10)
+                               return navi10_umc_hybrid_cdr_workaround(smu);
+               } else {
                        return navi10_set_dummy_pstates_table_location(smu);
+               }
        } else {
                if (adev->asic_type == CHIP_NAVI10)
                        return navi10_umc_hybrid_cdr_workaround(smu);