soc: qcom: spm: Add compatible for MSM8998 SAWv4.1 L2

Add the SAWv4.1 parameters for MSM8998's Gold and Silver clusters.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-5-angelogioacchino.delregno@somainline.org

diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
index fb8de9dcfee787c8d6a8fc6a9f33a0417c77547a..2961a89d929ced2c4c0bff46c828eb371c7b0e1d 100644 (file)
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
@@ -55,6 +55,18 @@ static const struct spm_reg_data spm_reg_660_silver_l2  = {
        .avs_limit = 0x4580458,
 };
 
+static const struct spm_reg_data spm_reg_8998_gold_l2  = {
+       .reg_offset = spm_reg_offset_v4_1,
+       .avs_ctl = 0x1010031,
+       .avs_limit = 0x4700470,
+};
+
+static const struct spm_reg_data spm_reg_8998_silver_l2  = {
+       .reg_offset = spm_reg_offset_v4_1,
+       .avs_ctl = 0x1010031,
+       .avs_limit = 0x4200420,
+};
+
 static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = {
        [SPM_REG_CFG]           = 0x08,
        [SPM_REG_SPM_CTL]       = 0x30,
@@ -166,6 +178,10 @@ static const struct of_device_id spm_match_table[] = {
          .data = &spm_reg_8226_cpu },
        { .compatible = "qcom,msm8974-saw2-v2.1-cpu",
          .data = &spm_reg_8974_8084_cpu },
+       { .compatible = "qcom,msm8998-gold-saw2-v4.1-l2",
+         .data = &spm_reg_8998_gold_l2 },
+       { .compatible = "qcom,msm8998-silver-saw2-v4.1-l2",
+         .data = &spm_reg_8998_silver_l2 },
        { .compatible = "qcom,apq8084-saw2-v2.1-cpu",
          .data = &spm_reg_8974_8084_cpu },
        { .compatible = "qcom,apq8064-saw2-v1.1-cpu",