ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf;
        memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory));
 
-       if (psp->adev->gmc.xgmi.connected_to_cpu)
+       if (amdgpu_ras_is_poison_mode_supported(adev))
                ras_cmd->ras_in_message.init_flags.poison_mode_en = 1;
-       else
+       if (!adev->gmc.xgmi.connected_to_cpu)
                ras_cmd->ras_in_message.init_flags.dgpu_mode = 1;
 
        ret = psp_ras_load(psp);
 
        if (!amdgpu_ras_intr_triggered()) {
                ret = psp_ras_enable_features(&adev->psp, info, enable);
                if (ret) {
-                       dev_err(adev->dev, "ras %s %s failed %d\n",
+                       dev_err(adev->dev, "ras %s %s failed poison:%d ret:%d\n",
                                enable ? "enable":"disable",
                                get_ras_block_str(head),
-                               ret);
+                               amdgpu_ras_is_poison_mode_supported(adev), ret);
                        goto out;
                }
        }
 {
        struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
        int r;
+       bool df_poison, umc_poison;
 
        if (con)
                return 0;
                        goto release_con;
        }
 
+       /* Init poison supported flag, the default value is false */
+       if (adev->df.funcs &&
+           adev->df.funcs->query_ras_poison_mode &&
+           adev->umc.ras_funcs &&
+           adev->umc.ras_funcs->query_ras_poison_mode) {
+               df_poison =
+                       adev->df.funcs->query_ras_poison_mode(adev);
+               umc_poison =
+                       adev->umc.ras_funcs->query_ras_poison_mode(adev);
+               /* Only poison is set in both DF and UMC, we can support it */
+               if (df_poison && umc_poison)
+                       con->poison_supported = true;
+               else if (df_poison != umc_poison)
+                       dev_warn(adev->dev, "Poison setting is inconsistent in DF/UMC(%d:%d)!\n",
+                                       df_poison, umc_poison);
+       }
+
        if (amdgpu_ras_fs_init(adev)) {
                r = -EINVAL;
                goto release_con;
        return 0;
 }
 
+bool amdgpu_ras_is_poison_mode_supported(struct amdgpu_device *adev)
+{
+       struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+
+       if (!con)
+               return false;
+
+       return con->poison_supported;
+}
+
 /* helper function to handle common stuff in ip late init phase */
 int amdgpu_ras_late_init(struct amdgpu_device *adev,
                         struct ras_common_if *ras_block,
 
        /* disable ras error count harvest in recovery */
        bool disable_ras_err_cnt_harvest;
 
+       /* is poison mode supported */
+       bool poison_supported;
+
        /* RAS count errors delayed work */
        struct delayed_work ras_counte_delay_work;
        atomic_t ras_ue_count;
 
 const char *get_ras_block_str(struct ras_common_if *ras_block);
 
+bool amdgpu_ras_is_poison_mode_supported(struct amdgpu_device *adev);
+
 #endif