net: qlge: Eliminate duplicate barriers on weakly-ordered archs

Code includes wmb() followed by writel(). writel() already has a barrier on
some architectures like arm64.

This ends up CPU observing two barriers back to back before executing the
register write.

Create a new wrapper function with relaxed write operator. Use the new
wrapper when a write is following a wmb().

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/qlogic/qlge/qlge.h b/drivers/net/ethernet/qlogic/qlge/qlge.h
index 84ac50f92c9c5167adfc5e295139a7a2d42a1eb3..3e71b65a954657f94f323c2320eba129025760b1 100644 (file)
--- a/drivers/net/ethernet/qlogic/qlge/qlge.h
+++ b/drivers/net/ethernet/qlogic/qlge/qlge.h
@@ -2184,6 +2184,22 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr)
        mmiowb();
 }
 
+/*
+ * Doorbell Registers:
+ * Doorbell registers are virtual registers in the PCI memory space.
+ * The space is allocated by the chip during PCI initialization.  The
+ * device driver finds the doorbell address in BAR 3 in PCI config space.
+ * The registers are used to control outbound and inbound queues. For
+ * example, the producer index for an outbound queue.  Each queue uses
+ * 1 4k chunk of memory.  The lower half of the space is for outbound
+ * queues. The upper half is for inbound queues.
+ * Caller has to guarantee ordering.
+ */
+static inline void ql_write_db_reg_relaxed(u32 val, void __iomem *addr)
+{
+       writel_relaxed(val, addr);
+}
+
 /*
  * Shadow Registers:
  * Outbound queues have a consumer index that is maintained by the chip.

diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
index 50038d946cede6baae64d9b223c61a273d25f458..8293c2028002c1d8caa022db842f49623c8060c0 100644 (file)
--- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c
+++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c
@@ -2700,7 +2700,8 @@ static netdev_tx_t qlge_send(struct sk_buff *skb, struct net_device *ndev)
                tx_ring->prod_idx = 0;
        wmb();
 
-       ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg);
+       ql_write_db_reg_relaxed(tx_ring->prod_idx, tx_ring->prod_idx_db_reg);
+       mmiowb();
        netif_printk(qdev, tx_queued, KERN_DEBUG, qdev->ndev,
                     "tx queued, slot %d, len %d\n",
                     tx_ring->prod_idx, skb->len);