There is one set of those registers for each port.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
 #define  DP_TP_CTL_LINK_TRAIN_PAT2             (1<<8)
 #define  DP_TP_CTL_LINK_TRAIN_NORMAL   (3<<8)
 
+/* DisplayPort Transport Status */
+#define DP_TP_STATUS_A                 0x64044
+#define DP_TP_STATUS_B                 0x64144
+#define DP_TP_STATUS(port) _PORT(port, \
+                                       DP_TP_STATUS_A, \
+                                       DP_TP_STATUS_B)
+#define  DP_TP_STATUS_AUTOTRAIN_DONE   (1<<12)
+
 #endif /* _I915_REG_H_ */