return 0;
 }
 
-static int tg3_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
+static int tg3_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
 {
        struct tg3 *tp = container_of(ptp, struct tg3, ptp_info);
-       bool neg_adj = false;
-       u32 correction = 0;
-
-       if (ppb < 0) {
-               neg_adj = true;
-               ppb = -ppb;
-       }
+       u64 correction;
+       bool neg_adj;
 
        /* Frequency adjustment is performed using hardware with a 24 bit
         * accumulator and a programmable correction value. On each clk, the
         * correction value gets added to the accumulator and when it
         * overflows, the time counter is incremented/decremented.
-        *
-        * So conversion from ppb to correction value is
-        *              ppb * (1 << 24) / 1000000000
         */
-       correction = div_u64((u64)ppb * (1 << 24), 1000000000ULL) &
-                    TG3_EAV_REF_CLK_CORRECT_MASK;
+       neg_adj = diff_by_scaled_ppm(1 << 24, scaled_ppm, &correction);
 
        tg3_full_lock(tp, 0);
 
        if (correction)
                tw32(TG3_EAV_REF_CLK_CORRECT_CTL,
                     TG3_EAV_REF_CLK_CORRECT_EN |
-                    (neg_adj ? TG3_EAV_REF_CLK_CORRECT_NEG : 0) | correction);
+                    (neg_adj ? TG3_EAV_REF_CLK_CORRECT_NEG : 0) |
+                    ((u32)correction & TG3_EAV_REF_CLK_CORRECT_MASK));
        else
                tw32(TG3_EAV_REF_CLK_CORRECT_CTL, 0);
 
        .n_per_out      = 1,
        .n_pins         = 0,
        .pps            = 0,
-       .adjfreq        = tg3_ptp_adjfreq,
+       .adjfine        = tg3_ptp_adjfine,
        .adjtime        = tg3_ptp_adjtime,
        .gettimex64     = tg3_ptp_gettimex,
        .settime64      = tg3_ptp_settime,