arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 35b34c40cdc85c13dd8dab884a33f229dc36b3fd..335a6dd17fcecf587575a3b17f31a20aeef828be 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -121,6 +121,86 @@
                        status = "disabled";
                };
 
+               ostm0: timer@11800000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x11800000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x43>;
+                       resets = <&cpg 0x6d>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm1: timer@11801000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x11801000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x44>;
+                       resets = <&cpg 0x6e>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm2: timer@14000000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x14000000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x45>;
+                       resets = <&cpg 0x6f>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm3: timer@14001000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x14001000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x46>;
+                       resets = <&cpg 0x70>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm4: timer@12c00000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x12c00000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x47>;
+                       resets = <&cpg 0x71>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm5: timer@12c01000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x12c01000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x48>;
+                       resets = <&cpg 0x72>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm6: timer@12c02000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x12c02000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x49>;
+                       resets = <&cpg 0x73>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               ostm7: timer@12c03000 {
+                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
+                       reg = <0x0 0x12c03000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&cpg CPG_MOD 0x4a>;
+                       resets = <&cpg 0x74>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
                scif: serial@11c01400 {
                        compatible = "renesas,scif-r9a09g057";
                        reg = <0 0x11c01400 0 0x400>;