net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO function

The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the
88E6393X as it requires certain P0_MODE, it also checks the CPU mode
as it impacts the bit setting value.

This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only
the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap
pin value but it can be changed without restrictions so that GPIO pins
9 and 10 are used as SMI pins.

So, introduce Amethyst specific function and call that if the Amethyst
family wants to setup the external PHY.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index f9378fca8305b580ae306bc8d68b6c4b1e3decca..9ed1821184ece57f2baa7e21003e91dc79d977b3 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3712,7 +3712,10 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,
 
        if (external) {
                mv88e6xxx_reg_lock(chip);
-               err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
+               if (chip->info->family == MV88E6XXX_FAMILY_6393)
+                       err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);
+               else
+                       err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
                mv88e6xxx_reg_unlock(chip);
 
                if (err)

diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h
index 20fefa08f54e0f1dee7cdaad894856ea2bed29ad..82f9b410de0b885ba31e2535b51b477a82e3a2ca 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/global2.h
+++ b/drivers/net/dsa/mv88e6xxx/global2.h
@@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops;
 
 int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
                                      bool external);
+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+                                      bool external);
 int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
 int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
 int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);

diff --git a/drivers/net/dsa/mv88e6xxx/global2_scratch.c b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
index 0e15efd898f2686ef44c0fd25694d7ee911c644b..61ab6cc4fbfcca294f89e921ffafdba147dc6d22 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c
+++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
@@ -290,6 +290,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
        return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
 }
 
+/**
+ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
+ * @chip: chip private data
+ * @external: set mux for external smi, or free for gpio usage
+ *
+ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an
+ * external SMI interface or as regular GPIO-s.
+ *
+ * They however have a different register layout then the existing
+ * function.
+ */
+
+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
+                                      bool external)
+{
+       int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
+       int err;
+       u8 val;
+
+       err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val);
+       if (err)
+               return err;
+
+       if (external)
+               val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
+       else
+               val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
+
+       return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
+}
+
 /**
  * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
  * @chip: chip private data