drm/i915/dp: Factor out intel_dp_config_required_rate()

Factor out intel_dp_config_required_rate() used by a follow-up patch
enabling the DP tunnel BW allocation mode.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-7-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0a2ee4339214219abb51f62865d4a196546008fc..c7e3e4efc324e4abe2e4825dde1520bec49689b9 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2343,6 +2343,17 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
                                                       limits);
 }
 
+int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state)
+{
+       const struct drm_display_mode *adjusted_mode =
+               &crtc_state->hw.adjusted_mode;
+       int bpp = crtc_state->dsc.compression_enable ?
+               to_bpp_int_roundup(crtc_state->dsc.compressed_bpp_x16) :
+               crtc_state->pipe_bpp;
+
+       return intel_dp_link_required(adjusted_mode->crtc_clock, bpp);
+}
+
 static int
 intel_dp_compute_link_config(struct intel_encoder *encoder,
                             struct intel_crtc_state *pipe_config,
@@ -2410,31 +2421,15 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
                        return ret;
        }
 
-       if (pipe_config->dsc.compression_enable) {
-               drm_dbg_kms(&i915->drm,
-                           "DP lane count %d clock %d Input bpp %d Compressed bpp " BPP_X16_FMT "\n",
-                           pipe_config->lane_count, pipe_config->port_clock,
-                           pipe_config->pipe_bpp,
-                           BPP_X16_ARGS(pipe_config->dsc.compressed_bpp_x16));
-
-               drm_dbg_kms(&i915->drm,
-                           "DP link rate required %i available %i\n",
-                           intel_dp_link_required(adjusted_mode->crtc_clock,
-                                                  to_bpp_int_roundup(pipe_config->dsc.compressed_bpp_x16)),
-                           drm_dp_max_dprx_data_rate(pipe_config->port_clock,
-                                                     pipe_config->lane_count));
-       } else {
-               drm_dbg_kms(&i915->drm, "DP lane count %d clock %d bpp %d\n",
-                           pipe_config->lane_count, pipe_config->port_clock,
-                           pipe_config->pipe_bpp);
+       drm_dbg_kms(&i915->drm,
+                   "DP lane count %d clock %d bpp input %d compressed " BPP_X16_FMT " link rate required %d available %d\n",
+                   pipe_config->lane_count, pipe_config->port_clock,
+                   pipe_config->pipe_bpp,
+                   BPP_X16_ARGS(pipe_config->dsc.compressed_bpp_x16),
+                   intel_dp_config_required_rate(pipe_config),
+                   drm_dp_max_dprx_data_rate(pipe_config->port_clock,
+                                             pipe_config->lane_count));
 
-               drm_dbg_kms(&i915->drm,
-                           "DP link rate required %i available %i\n",
-                           intel_dp_link_required(adjusted_mode->crtc_clock,
-                                                  pipe_config->pipe_bpp),
-                           drm_dp_max_dprx_data_rate(pipe_config->port_clock,
-                                                     pipe_config->lane_count));
-       }
        return 0;
 }
 

diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 20252984b3b04cf7c8282c28780564351955a135..4667870fed31a2228b4dea505c7ed5d944e20800 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -100,6 +100,7 @@ void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
+int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state);
 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 
 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,