]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: sprd: reorder clock-names after clocks
authorStanislav Jakubek <stano.jakubek@gmail.com>
Mon, 5 Aug 2024 07:24:35 +0000 (09:24 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 12 Aug 2024 10:09:54 +0000 (12:09 +0200)
DT convention is to have property-names after property.
While at it, cleanup indentation for some clocks.
No functional change.

Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Link: https://lore.kernel.org/r/13ea4a27f0d1428a925a6f817f9370673eaec938.1722842067.git.stano.jakubek@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/sprd/sc9863a.dtsi
arch/arm64/boot/dts/sprd/ums512.dtsi
arch/arm64/boot/dts/sprd/whale2.dtsi

index a7b89796688295b25302a28f6ed8515e3804e393..e5a2857721e2fb7be2ce29eb5a4d4ebf32aa8b63 100644 (file)
                                reg = <0 0x20300000 0 0x1000>;
                                interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 
-                               clock-names = "sdio", "enable";
                                clocks = <&aon_clk CLK_SDIO0_2X>,
                                         <&apahb_gate CLK_SDIO0_EB>;
+                               clock-names = "sdio", "enable";
                                assigned-clocks = <&aon_clk CLK_SDIO0_2X>;
                                assigned-clock-parents = <&rpll CLK_RPLL_390M>;
 
                                reg = <0 0x20600000 0 0x1000>;
                                interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
 
-                               clock-names = "sdio", "enable";
                                clocks = <&aon_clk CLK_EMMC_2X>,
                                         <&apahb_gate CLK_EMMC_EB>;
+                               clock-names = "sdio", "enable";
                                assigned-clocks = <&aon_clk CLK_EMMC_2X>;
                                assigned-clock-parents = <&rpll CLK_RPLL_390M>;
 
index 4c080df487240ea1b9e6c8974912158a6869932a..efa14309cc4efe4962f3856f4b7ed1414c35446d 100644 (file)
                                compatible = "sprd,sdhci-r11";
                                reg = <0x1100000 0x1000>;
                                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "sdio", "enable";
                                clocks = <&ap_clk CLK_SDIO0_2X>,
                                         <&apapb_gate CLK_SDIO0_EB>;
+                               clock-names = "sdio", "enable";
                                assigned-clocks = <&ap_clk CLK_SDIO0_2X>;
                                assigned-clock-parents = <&pll1 CLK_RPLL>;
                                status = "disabled";
                                compatible = "sprd,sdhci-r11";
                                reg = <0x1400000 0x1000>;
                                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "sdio", "enable";
                                clocks = <&ap_clk CLK_EMMC_2X>,
                                         <&apapb_gate CLK_EMMC_EB>;
+                               clock-names = "sdio", "enable";
                                assigned-clocks = <&ap_clk CLK_EMMC_2X>;
                                assigned-clock-parents = <&pll1 CLK_RPLL>;
                                status = "disabled";
index cdf52fd78ee46fce155f65dbe81b69a5ce6512bc..a28f995fb3ff07aedd3cad4af7ff9502668fb78d 100644 (file)
                                             "sprd,sc9836-uart";
                                reg = <0x0 0x100>;
                                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "enable", "uart", "source";
                                clocks = <&apapb_gate CLK_UART0_EB>,
-                                      <&ap_clk CLK_UART0>, <&ext_26m>;
+                                        <&ap_clk CLK_UART0>,
+                                        <&ext_26m>;
+                               clock-names = "enable", "uart", "source";
                                status = "disabled";
                        };
 
                                             "sprd,sc9836-uart";
                                reg = <0x100000 0x100>;
                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "enable", "uart", "source";
                                clocks = <&apapb_gate CLK_UART1_EB>,
-                                      <&ap_clk CLK_UART1>, <&ext_26m>;
+                                        <&ap_clk CLK_UART1>,
+                                        <&ext_26m>;
+                               clock-names = "enable", "uart", "source";
                                status = "disabled";
                        };
 
                                             "sprd,sc9836-uart";
                                reg = <0x200000 0x100>;
                                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "enable", "uart", "source";
                                clocks = <&apapb_gate CLK_UART2_EB>,
-                                      <&ap_clk CLK_UART2>, <&ext_26m>;
+                                        <&ap_clk CLK_UART2>,
+                                        <&ext_26m>;
+                               clock-names = "enable", "uart", "source";
                                status = "disabled";
                        };
 
                                             "sprd,sc9836-uart";
                                reg = <0x300000 0x100>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-names = "enable", "uart", "source";
                                clocks = <&apapb_gate CLK_UART3_EB>,
-                                      <&ap_clk CLK_UART3>, <&ext_26m>;
+                                        <&ap_clk CLK_UART3>,
+                                        <&ext_26m>;
+                               clock-names = "enable", "uart", "source";
                                status = "disabled";
                        };
                };
                                /* For backwards compatibility: */
                                #dma-channels = <32>;
                                dma-channels = <32>;
-                               clock-names = "enable";
                                clocks = <&apahb_gate CLK_DMA_EB>;
+                               clock-names = "enable";
                        };
 
                        sdio3: mmc@50430000 {
                                reg = <0 0x50430000 0 0x1000>;
                                interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 
-                               clock-names = "sdio", "enable", "2x_enable";
                                clocks = <&aon_prediv CLK_EMMC_2X>,
-                                      <&apahb_gate CLK_EMMC_EB>,
-                                      <&aon_gate CLK_EMMC_2X_EN>;
+                                        <&apahb_gate CLK_EMMC_EB>,
+                                        <&aon_gate CLK_EMMC_2X_EN>;
+                               clock-names = "sdio", "enable", "2x_enable";
                                assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
                                assigned-clock-parents = <&clk_l0_409m6>;
 
                                compatible = "sprd,hwspinlock-r3p0";
                                reg = <0 0x40500000 0 0x1000>;
                                #hwlock-cells = <1>;
-                               clock-names = "enable";
                                clocks = <&aon_gate CLK_SPLK_EB>;
+                               clock-names = "enable";
                        };
 
                        eic_debounce: gpio@40210000 {
                                reg = <0 0x40310000 0 0x1000>;
                                interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-sec = <12>;
-                               clock-names = "enable", "rtc_enable";
                                clocks = <&aon_gate CLK_APCPU_WDG_EB>,
-                                      <&aon_gate CLK_AP_WDG_RTC_EB>;
+                                        <&aon_gate CLK_AP_WDG_RTC_EB>;
+                               clock-names = "enable", "rtc_enable";
                        };
                };
 
                                /* For backwards compatibility: */
                                #dma-channels = <32>;
                                dma-channels = <32>;
-                               clock-names = "enable", "ashb_eb";
                                clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
-                                      <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+                                        <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+                               clock-names = "enable", "ashb_eb";
                        };
                };
        };