drm/i915: Store struct intel_crtc * in {pipe,plane}_to_crtc_mapping[]

A lot of users of the {pipe,plane}_to_crtc_mapping[] will end up
casting the result to intel_crtc, so let's just store the intel_crtc
pointer in the first place.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-7-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index bf19192dcc3b09e0c2b132485468b5992ab18916..1696f7b7321cc0e16c9fb4678880ac8347754923 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4065,8 +4065,7 @@ static void hsw_trans_edp_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
                                        bool enable)
 {
        struct drm_device *dev = &dev_priv->drm;
-       struct intel_crtc *crtc =
-               to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_A]);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[PIPE_A];
        struct intel_crtc_state *pipe_config;
        struct drm_atomic_state *state;
        int ret = 0;
@@ -4134,8 +4133,7 @@ static int pipe_crc_set_source(struct drm_i915_private *dev_priv,
 {
        struct drm_device *dev = &dev_priv->drm;
        struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[pipe];
-       struct intel_crtc *crtc =
-                       to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
+       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev, pipe);
        enum intel_display_power_domain power_domain;
        u32 val = 0; /* shut up gcc */
        int ret;
@@ -4206,8 +4204,7 @@ static int pipe_crc_set_source(struct drm_i915_private *dev_priv,
        /* real source -> none transition */
        if (source == INTEL_PIPE_CRC_SOURCE_NONE) {
                struct intel_pipe_crc_entry *entries;
-               struct intel_crtc *crtc =
-                       to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+               struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
                DRM_DEBUG_DRIVER("stopping CRCs for pipe %c\n",
                                 pipe_name(pipe));

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 98f59863fe6b392e4bf49872782e3f36f872663e..eeed752da9df0faff2851defa487252d8ee62d7c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1935,8 +1935,8 @@ struct drm_i915_private {
 
        /* Kernel Modesetting */
 
-       struct drm_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
-       struct drm_crtc *pipe_to_crtc_mapping[I915_MAX_PIPES];
+       struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
+       struct intel_crtc *pipe_to_crtc_mapping[I915_MAX_PIPES];
        wait_queue_head_t pending_flip_queue;
 
 #ifdef CONFIG_DEBUG_FS

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4dda2b1eefdbad6dc838d88c4500846ac0cd910b..696dc6f339ac86e774bc1b9e34ac985a1b2994a2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -725,8 +725,7 @@ static u32 i915_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
        struct drm_i915_private *dev_priv = to_i915(dev);
        i915_reg_t high_frame, low_frame;
        u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal;
-       struct intel_crtc *intel_crtc =
-               to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+       struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        const struct drm_display_mode *mode = &intel_crtc->base.hwmode;
 
        htotal = mode->crtc_htotal;
@@ -831,8 +830,7 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
                                    const struct drm_display_mode *mode)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        int position;
        int vbl_start, vbl_end, hsync_start, htotal, vtotal;
        bool in_vbl = true;
@@ -967,7 +965,7 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, unsigned int pipe,
                              struct timeval *vblank_time,
                              unsigned flags)
 {
-       struct drm_crtc *crtc;
+       struct intel_crtc *crtc;
 
        if (pipe >= INTEL_INFO(dev)->num_pipes) {
                DRM_ERROR("Invalid crtc %u\n", pipe);
@@ -981,7 +979,7 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, unsigned int pipe,
                return -EINVAL;
        }
 
-       if (!crtc->hwmode.crtc_clock) {
+       if (!crtc->base.hwmode.crtc_clock) {
                DRM_DEBUG_KMS("crtc %u is disabled\n", pipe);
                return -EBUSY;
        }
@@ -989,7 +987,7 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, unsigned int pipe,
        /* Helper routine in DRM core does all the work: */
        return drm_calc_vbltimestamp_from_scanoutpos(dev, pipe, max_error,
                                                     vblank_time, flags,
-                                                    &crtc->hwmode);
+                                                    &crtc->base.hwmode);
 }
 
 static void ironlake_rps_change_irq_handler(struct drm_i915_private *dev_priv)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 936870d18851ab2a66131c53ebfd864607b3ed79..bed201a65f09075c71394810721e3c01521029af 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1030,10 +1030,9 @@ bool intel_crtc_active(struct intel_crtc *crtc)
 enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
                                             enum pipe pipe)
 {
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
-       return intel_crtc->config->cpu_transcoder;
+       return crtc->config->cpu_transcoder;
 }
 
 static bool pipe_dsl_stopped(struct drm_device *dev, enum pipe pipe)
@@ -1786,8 +1785,7 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
 static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
                                           enum pipe pipe)
 {
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *intel_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        i915_reg_t reg;
        uint32_t val, pipeconf_val;
 
@@ -7073,7 +7071,7 @@ static int ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
                if (pipe_config->fdi_lanes <= 2)
                        return 0;
 
-               other_crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, PIPE_C));
+               other_crtc = intel_get_crtc_for_pipe(dev, PIPE_C);
                other_crtc_state =
                        intel_atomic_get_crtc_state(state, other_crtc);
                if (IS_ERR(other_crtc_state))
@@ -7092,7 +7090,7 @@ static int ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
                        return -EINVAL;
                }
 
-               other_crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, PIPE_B));
+               other_crtc = intel_get_crtc_for_pipe(dev, PIPE_B);
                other_crtc_state =
                        intel_atomic_get_crtc_state(state, other_crtc);
                if (IS_ERR(other_crtc_state))
@@ -8107,8 +8105,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
 int vlv_force_pll_on(struct drm_device *dev, enum pipe pipe,
                     const struct dpll *dpll)
 {
-       struct intel_crtc *crtc =
-               to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
+       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev, pipe);
        struct intel_crtc_state *pipe_config;
 
        pipe_config = kzalloc(sizeof(*pipe_config), GFP_KERNEL);
@@ -11663,8 +11660,7 @@ static bool pageflip_finished(struct intel_crtc *crtc,
 void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe)
 {
        struct drm_device *dev = &dev_priv->drm;
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        struct intel_flip_work *work;
        unsigned long flags;
 
@@ -11677,12 +11673,12 @@ void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe)
         * lost pageflips) so needs the full irqsave spinlocks.
         */
        spin_lock_irqsave(&dev->event_lock, flags);
-       work = intel_crtc->flip_work;
+       work = crtc->flip_work;
 
        if (work != NULL &&
            !is_mmio_work(work) &&
-           pageflip_finished(intel_crtc, work))
-               page_flip_completed(intel_crtc);
+           pageflip_finished(crtc, work))
+               page_flip_completed(crtc);
 
        spin_unlock_irqrestore(&dev->event_lock, flags);
 }
@@ -11690,8 +11686,7 @@ void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe)
 void intel_finish_page_flip_mmio(struct drm_i915_private *dev_priv, int pipe)
 {
        struct drm_device *dev = &dev_priv->drm;
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        struct intel_flip_work *work;
        unsigned long flags;
 
@@ -11704,12 +11699,12 @@ void intel_finish_page_flip_mmio(struct drm_i915_private *dev_priv, int pipe)
         * lost pageflips) so needs the full irqsave spinlocks.
         */
        spin_lock_irqsave(&dev->event_lock, flags);
-       work = intel_crtc->flip_work;
+       work = crtc->flip_work;
 
        if (work != NULL &&
            is_mmio_work(work) &&
-           pageflip_finished(intel_crtc, work))
-               page_flip_completed(intel_crtc);
+           pageflip_finished(crtc, work))
+               page_flip_completed(crtc);
 
        spin_unlock_irqrestore(&dev->event_lock, flags);
 }
@@ -12121,8 +12116,7 @@ static bool __pageflip_stall_check_cs(struct drm_i915_private *dev_priv,
 void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe)
 {
        struct drm_device *dev = &dev_priv->drm;
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        struct intel_flip_work *work;
 
        WARN_ON(!in_interrupt());
@@ -12131,19 +12125,19 @@ void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe)
                return;
 
        spin_lock(&dev->event_lock);
-       work = intel_crtc->flip_work;
+       work = crtc->flip_work;
 
        if (work != NULL && !is_mmio_work(work) &&
-           __pageflip_stall_check_cs(dev_priv, intel_crtc, work)) {
+           __pageflip_stall_check_cs(dev_priv, crtc, work)) {
                WARN_ONCE(1,
                          "Kicking stuck page flip: queued at %d, now %d\n",
-                       work->flip_queued_vblank, intel_crtc_get_vblank_counter(intel_crtc));
-               page_flip_completed(intel_crtc);
+                       work->flip_queued_vblank, intel_crtc_get_vblank_counter(crtc));
+               page_flip_completed(crtc);
                work = NULL;
        }
 
        if (work != NULL && !is_mmio_work(work) &&
-           intel_crtc_get_vblank_counter(intel_crtc) - work->flip_queued_vblank > 1)
+           intel_crtc_get_vblank_counter(crtc) - work->flip_queued_vblank > 1)
                intel_queue_rps_boost_for_request(work->flip_queued_req);
        spin_unlock(&dev->event_lock);
 }
@@ -14181,22 +14175,22 @@ static void intel_atomic_wait_for_vblanks(struct drm_device *dev,
                return;
 
        for_each_pipe(dev_priv, pipe) {
-               struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+               struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
                if (!((1 << pipe) & crtc_mask))
                        continue;
 
-               ret = drm_crtc_vblank_get(crtc);
+               ret = drm_crtc_vblank_get(&crtc->base);
                if (WARN_ON(ret != 0)) {
                        crtc_mask &= ~(1 << pipe);
                        continue;
                }
 
-               last_vblank_count[pipe] = drm_crtc_vblank_count(crtc);
+               last_vblank_count[pipe] = drm_crtc_vblank_count(&crtc->base);
        }
 
        for_each_pipe(dev_priv, pipe) {
-               struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+               struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
                long lret;
 
                if (!((1 << pipe) & crtc_mask))
@@ -14204,12 +14198,12 @@ static void intel_atomic_wait_for_vblanks(struct drm_device *dev,
 
                lret = wait_event_timeout(dev->vblank[pipe].queue,
                                last_vblank_count[pipe] !=
-                                       drm_crtc_vblank_count(crtc),
+                                       drm_crtc_vblank_count(&crtc->base),
                                msecs_to_jiffies(50));
 
                WARN(!lret, "pipe %c vblank wait timed out\n", pipe_name(pipe));
 
-               drm_crtc_vblank_put(crtc);
+               drm_crtc_vblank_put(&crtc->base);
        }
 }
 
@@ -15317,8 +15311,8 @@ static int intel_crtc_init(struct drm_device *dev, enum pipe pipe)
 
        BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
               dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
-       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
-       dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;
+       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
+       dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = intel_crtc;
 
        drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
 
@@ -16871,7 +16865,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
                pipe = 0;
 
                if (encoder->get_hw_state(encoder, &pipe)) {
-                       crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+                       crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+
                        encoder->base.crtc = &crtc->base;
                        crtc->config->output_types |= 1 << encoder->type;
                        encoder->get_config(encoder, crtc->config);
@@ -16972,7 +16967,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
        }
 
        for_each_pipe(dev_priv, pipe) {
-               crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+               crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+
                intel_sanitize_crtc(crtc);
                intel_dump_pipe_config(crtc, crtc->config,
                                       "[setup_hw_state]");

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8ae13a6d0cc351b9a546fe029cdb36038409bf53..58e33c3a1bdf8f473a2e5bdc09fa64587bcf5f83 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1028,14 +1028,14 @@ vlv_pipe_to_channel(enum pipe pipe)
        }
 }
 
-static inline struct drm_crtc *
+static inline struct intel_crtc *
 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
        return dev_priv->pipe_to_crtc_mapping[pipe];
 }
 
-static inline struct drm_crtc *
+static inline struct intel_crtc *
 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
@@ -1251,8 +1251,7 @@ intel_wait_for_vblank(struct drm_device *dev, int pipe)
 static inline void
 intel_wait_for_vblank_if_active(struct drm_device *dev, int pipe)
 {
-       const struct intel_crtc *crtc =
-               to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
+       const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev, pipe);
 
        if (crtc->active)
                intel_wait_for_vblank(dev, pipe);

diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index cd574900cd8d03d58a95e7b74609a975e6d93ae2..61d78fc36b6daeff2e4d53a0414ad4f0efb80acb 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -393,12 +393,12 @@ intel_dvo_get_current_mode(struct drm_connector *connector)
         * its timings to get how the BIOS set up the panel.
         */
        if (dvo_val & DVO_ENABLE) {
-               struct drm_crtc *crtc;
+               struct intel_crtc *crtc;
                int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 
                crtc = intel_get_crtc_for_pipe(dev, pipe);
                if (crtc) {
-                       mode = intel_crtc_mode_get(dev, crtc);
+                       mode = intel_crtc_mode_get(dev, &crtc->base);
                        if (mode) {
                                mode->type |= DRM_MODE_TYPE_PREFERRED;
                                if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)

diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index 3018f4f589c8cc98b427a2e20e7c55b415b0198e..34f93f112107b4811775c4ae64a04991560b3732 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -57,7 +57,7 @@ static bool ivb_can_enable_err_int(struct drm_device *dev)
        assert_spin_locked(&dev_priv->irq_lock);
 
        for_each_pipe(dev_priv, pipe) {
-               crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+               crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
                if (crtc->cpu_fifo_underrun_disabled)
                        return false;
@@ -75,7 +75,7 @@ static bool cpt_can_enable_serr_int(struct drm_device *dev)
        assert_spin_locked(&dev_priv->irq_lock);
 
        for_each_pipe(dev_priv, pipe) {
-               crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+               crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
                if (crtc->pch_fifo_underrun_disabled)
                        return false;
@@ -245,14 +245,13 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
                                                    enum pipe pipe, bool enable)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        bool old;
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       old = !intel_crtc->cpu_fifo_underrun_disabled;
-       intel_crtc->cpu_fifo_underrun_disabled = !enable;
+       old = !crtc->cpu_fifo_underrun_disabled;
+       crtc->cpu_fifo_underrun_disabled = !enable;
 
        if (HAS_GMCH_DISPLAY(dev_priv))
                i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old);
@@ -314,8 +313,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
                                           enum transcoder pch_transcoder,
                                           bool enable)
 {
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder];
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder];
        unsigned long flags;
        bool old;
 
@@ -330,8 +328,8 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
 
        spin_lock_irqsave(&dev_priv->irq_lock, flags);
 
-       old = !intel_crtc->pch_fifo_underrun_disabled;
-       intel_crtc->pch_fifo_underrun_disabled = !enable;
+       old = !crtc->pch_fifo_underrun_disabled;
+       crtc->pch_fifo_underrun_disabled = !enable;
 
        if (HAS_PCH_IBX(dev_priv))
                ibx_set_fifo_underrun_reporting(&dev_priv->drm,
@@ -358,7 +356,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                                         enum pipe pipe)
 {
-       struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+       struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
        /* We may be called too early in init, thanks BIOS! */
        if (crtc == NULL)
@@ -366,7 +364,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
 
        /* GMCH can't disable fifo underruns, filter them. */
        if (HAS_GMCH_DISPLAY(dev_priv) &&
-           to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
+           crtc->cpu_fifo_underrun_disabled)
                return;
 
        if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))

diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 199b90c7907a94c406f03190d3e8f0d1a65ce95e..81ed32b4f89921068ba2eb300a4d450470042775 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -985,7 +985,7 @@ void intel_lvds_init(struct drm_device *dev)
        struct drm_display_mode *fixed_mode = NULL;
        struct drm_display_mode *downclock_mode = NULL;
        struct edid *edid;
-       struct drm_crtc *crtc;
+       struct intel_crtc *crtc;
        i915_reg_t lvds_reg;
        u32 lvds;
        int pipe;
@@ -1166,7 +1166,7 @@ void intel_lvds_init(struct drm_device *dev)
        crtc = intel_get_crtc_for_pipe(dev, pipe);
 
        if (crtc && (lvds & LVDS_PORT_EN)) {
-               fixed_mode = intel_crtc_mode_get(dev, crtc);
+               fixed_mode = intel_crtc_mode_get(dev, &crtc->base);
                if (fixed_mode) {
                        DRM_DEBUG_KMS("using current (BIOS) mode: ");
                        drm_mode_debug_printmodeline(fixed_mode);

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f3bd2200d7c53c0070fcd1d8192f8f942149a3eb..8d1040c7ed8df72d26c3ee527e4ea2a9a9b5acd1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -728,7 +728,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
        int line_time_us, line_count;
        int entries, tlb_miss;
 
-       crtc = to_intel_crtc(intel_get_crtc_for_plane(dev, plane));
+       crtc = intel_get_crtc_for_plane(dev, plane);
        if (!intel_crtc_active(crtc)) {
                *cursor_wm = cursor->guard_size;
                *plane_wm = display->guard_size;
@@ -823,7 +823,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
                return false;
        }
 
-       crtc = to_intel_crtc(intel_get_crtc_for_plane(dev, plane));
+       crtc = intel_get_crtc_for_plane(dev, plane);
        adjusted_mode = &crtc->config->base.adjusted_mode;
        fb = crtc->base.primary->state->fb;
        clock = adjusted_mode->crtc_clock;
@@ -1546,7 +1546,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
                wm_info = &i830_a_wm_info;
 
        fifo_size = dev_priv->display.get_fifo_size(dev, 0);
-       crtc = to_intel_crtc(intel_get_crtc_for_plane(dev, 0));
+       crtc = intel_get_crtc_for_plane(dev, 0);
        if (intel_crtc_active(crtc)) {
                const struct drm_display_mode *adjusted_mode =
                        &crtc->config->base.adjusted_mode;
@@ -1573,7 +1573,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
                wm_info = &i830_bc_wm_info;
 
        fifo_size = dev_priv->display.get_fifo_size(dev, 1);
-       crtc = to_intel_crtc(intel_get_crtc_for_plane(dev, 1));
+       crtc = intel_get_crtc_for_plane(dev, 1);
        if (intel_crtc_active(crtc)) {
                const struct drm_display_mode *adjusted_mode =
                        &crtc->config->base.adjusted_mode;
@@ -3066,7 +3066,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
 
        /* Since we're now guaranteed to only have one active CRTC... */
        pipe = ffs(intel_state->active_crtcs) - 1;
-       crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+       crtc = dev_priv->pipe_to_crtc_mapping[pipe];
        cstate = to_intel_crtc_state(crtc->base.state);
 
        if (crtc->base.state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)