*  efuse_ctrl_std
  *  mpu_c0
  *  mpu_c1
- *  ocmc_ram
  *  ocp_wp_noc
  *  prcm_mpu
  *  prm
        },
 };
 
+/*
+ * 'ocmc_ram' class
+ * top-level core on-chip ram
+ */
+
+static struct omap_hwmod_class omap44xx_ocmc_ram_hwmod_class = {
+       .name   = "ocmc_ram",
+};
+
+/* ocmc_ram */
+static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {
+       .name           = "ocmc_ram",
+       .class          = &omap44xx_ocmc_ram_hwmod_class,
+       .clkdm_name     = "l3_2_clkdm",
+       .prcm = {
+               .omap4 = {
+                       .clkctrl_offs = OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET,
+                       .context_offs = OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET,
+               },
+       },
+};
+
 /*
  * 'ocp2scp' class
  * bridge to transform ocp interface protocol to scp (serial control port)
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l3_main_2 -> ocmc_ram */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
+       .master         = &omap44xx_l3_main_2_hwmod,
+       .slave          = &omap44xx_ocmc_ram_hwmod,
+       .clk            = "l3_div_ck",
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_cfg -> ocp2scp_usb_phy */
 static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {
        .master         = &omap44xx_l4_cfg_hwmod,
        &omap44xx_l4_per__mmc3,
        &omap44xx_l4_per__mmc4,
        &omap44xx_l4_per__mmc5,
+       &omap44xx_l3_main_2__ocmc_ram,
        &omap44xx_l4_cfg__ocp2scp_usb_phy,
        &omap44xx_l3_main_2__sl2if,
        &omap44xx_l4_abe__slimbus1,