struct drm_device *dev = crtc->dev;
        struct tilcdc_drm_private *priv = dev->dev_private;
        struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
-       unsigned long clk_rate, real_rate, req_rate;
+       unsigned long clk_rate, real_rate, pclk_rate;
        unsigned int clkdiv;
        int ret;
 
        clkdiv = 2; /* first try using a standard divider of 2 */
 
        /* mode.clock is in KHz, set_rate wants parameter in Hz */
-       req_rate = crtc->mode.clock * 1000;
+       pclk_rate = crtc->mode.clock * 1000;
 
-       ret = clk_set_rate(priv->clk, req_rate * clkdiv);
+       ret = clk_set_rate(priv->clk, pclk_rate * clkdiv);
        clk_rate = clk_get_rate(priv->clk);
-       if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) {
+       if (ret < 0 || tilcdc_pclk_diff(pclk_rate, clk_rate) > 5) {
                /*
                 * If we fail to set the clock rate (some architectures don't
                 * use the common clock framework yet and may not implement
                        return;
                }
 
-               clkdiv = DIV_ROUND_CLOSEST(clk_rate, req_rate);
+               clkdiv = DIV_ROUND_CLOSEST(clk_rate, pclk_rate);
 
                /*
                 * Emit a warning if the real clock rate resulting from the
                 * 5% is an arbitrary value - LCDs are usually quite tolerant
                 * about pixel clock rates.
                 */
-               real_rate = clkdiv * req_rate;
+               real_rate = clkdiv * pclk_rate;
 
                if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) {
                        dev_warn(dev->dev,